Richard F. Hobson

Publication Activity (10 Years)

Years Active: 1976-2015
Publications (10 Years): 1

Top Topics

Power Reduction

Digital Signal Processing

Top Venues

Int. J. Circuit Theory Appl.

Publications

Richard F. Hobson
A framework for high-speed parallel-prefix adder performance evaluation and comparison. Int. J. Circuit Theory Appl. 43 (10) (2015)
Hooman Jarollahi, Richard F. Hobson
Dynamic Power Reduction in a Novel CMOS 5T-SRAM for Low-Power SoC CoRR (2013)
Hooman Jarollahi, Richard F. Hobson
Dynamic Power Reduction in a Novel CMOS 5T-SRAM for Low-Power SoC. CDES (2010)
Richard F. Hobson
A Low-Power, Pulsed Domino CMOS 64-bit Adder. CDES (2010)
Richard F. Hobson
A 5T Sram Cell with 4 Power Terminals for Read/Write/Standby Assist. CDES (2009)
Richard F. Hobson
A New Single-Ended SRAM Cell With Write-Assist. IEEE Trans. Very Large Scale Integr. Syst. 15 (2) (2007)
Richard F. Hobson, Allan R. Dyck, Keith L. Cheung, Bill Ressl
Signal Processing with Teams of Embedded Workhorse Processors. EURASIP J. Embed. Syst. 2006 (2006)
Richard F. Hobson, Scott Wakelin
An Area-Efficient High-Speed AES S-Box Method. IWSOC (2005)
Richard F. Hobson, Allan R. Dyck, Keith L. Cheung
SoC Features for a Multi-Processor WCDMA Base-station Modem. IWSOC (2004)
R. Balakrishnan, Richard F. Hobson
A Greedy Router with Technology Targetable Output. Great Lakes Symposium on VLSI (1999)
Richard F. Hobson, Allan R. Dyck
A Multiple-Input Single-Phase Clock Flip-Flop Family. Great Lakes Symposium on VLSI (1999)
Richard F. Hobson, P. S. Wong
A parallel embedded-processor architecture for ATM reassembly. IEEE/ACM Trans. Netw. 7 (1) (1999)
Allan R. Dyck, S. Evenson, H. Fu, Richard F. Hobson
User selectable feature support for an embedded processor. ISCAS (1) (1999)
Richard F. Hobson
Power Reducing Techniques for Clocked CMOS PLAs. Great Lakes Symposium on VLSI (1998)
Richard F. Hobson, Michael W. Fraser
An efficient maximum-redundancy radix-8 SRT division and square-root method. IEEE J. Solid State Circuits 30 (1) (1995)
Richard F. Hobson, J. D. Hoskin, R. W. Spilsbury
Opportunities for System and User Features in a New APL Interpreter. APL (1989)
Severin Gaudet, Richard F. Hobson, Pradeep Chilka, Thomas W. Calvert
Multiprocessor experiments for high-speed ray tracing. ACM Trans. Graph. 7 (3) (1988)
Richard F. Hobson
A Directly Executable Encoding for APL. ACM Trans. Program. Lang. Syst. 6 (3) (1984)
Richard F. Hobson
Structured Machine Design: An Ongoing Experiement. ISCA (1981)
Richard F. Hobson
Software sympathetic chip set design. AFIPS National Computer Conference (1981)
Richard F. Hobson, Patrick Hannon, Jonathan Thornburg
High-level microprogramming with APL syntax. MICRO (1981)
Richard F. Hobson
Computing science hardware laboratories and the LSI revolution. SIGCSE/CSA (1978)
I. Ganapathy, Richard F. Hobson
GPMS, a general purpose memory management system - user's memory - that is. APL (1976)