Power Reducing Techniques for Clocked CMOS PLAs.

Richard F. Hobson

Published in: Great Lakes Symposium on VLSI (1998)

Keyphrases

power consumption
low power
power reduction
single chip
high speed
power management
power dissipation
low cost
image sensor
ultra low power
image processing
cmos technology
vlsi circuits
data sets
multiscale
artificial intelligence
genetic algorithm
low voltage
neural network
cmos image sensor