A parallel embedded-processor architecture for ATM reassembly.
Richard F. HobsonP. S. WongPublished in: IEEE/ACM Trans. Netw. (1999)
Keyphrases
- multi processor
- parallel architecture
- level parallelism
- processing elements
- multi core processors
- parallel processing
- distributed memory
- shared memory
- single processor
- distributed processing
- single instruction multiple data
- computer architecture
- multithreading
- inter processor communication
- master slave
- parallel computers
- instruction set
- multiprocessor systems
- systolic array
- parallel algorithm
- parallel implementation
- industry standard
- management system
- parallel architectures
- hardware implementation
- load balancing
- real time
- parallel processors
- processing units
- massively parallel
- dynamic random access memory
- memory management
- atm networks
- data parallelism
- parallel computing
- embedded systems
- associative memory