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Raviteja Kammari
ORCID
Publication Activity (10 Years)
Years Active: 2019-2024
Publications (10 Years): 7
Top Topics
Power Reduction
Radio Frequency
Nm Technology
Sampling Strategies
Top Venues
Int. J. Circuit Theory Appl.
IEEE Trans. Very Large Scale Integr. Syst.
APCCAS
MWSCAS
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Publications
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Rakesh Varma Rena
,
Raviteja Kammari
,
Vijay Shankar Pasupureddi
A 0.4-1.8-GHz Quarter-Rate Subsampling Mixer-First Direct Down-Conversion RF Front-End.
IEEE Trans. Very Large Scale Integr. Syst.
32 (3) (2024)
Rakesh Varma Rena
,
Raviteja Kammari
,
Vijay Shankar Pasupureddi
0.4-1 GHz Subsampling Mixer-First RF Front-End With 50-dB HRR, +10-dBm IB-IIP3 in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst.
31 (7) (2023)
Raviteja Kammari
,
Sarvesh Rajesh Tuckely
,
Vijay Shankar Pasupureddi
A 1-6 GHz, Sub-mW Self-Aligned Quadrature Phase Clock Generator in 1.2 V, 65 nm CMOS.
APCCAS
(2023)
Prema Kumar Govindaswamy
,
Raviteja Kammari
,
Vijaya Sankara Rao Pasupureddi
An adaptive link training based hybrid circuit topology for full-duplex on-chip interconnects.
Int. J. Circuit Theory Appl.
51 (8) (2023)
Rakesh Rena
,
Raviteja Kammari
,
Vijaya Sankara Rao Pasupureddi
Digitally Intensive Sub-sampling Mixer-First Direct Down-Conversion Receiver Architecture.
MWSCAS
(2022)
Raviteja Kammari
,
Vijaya Sankara Rao Pasupureddi
Charge controlled delay element enabled widely linear power efficient MPCG-MDLL in 1.2V, 65nm CMOS.
Int. J. Circuit Theory Appl.
48 (2) (2020)
Raviteja Kammari
,
Vijaya Sankara Rao Pasupureddi
A Widely Linear, Power Efficient, Charge Controlled Delay Element for Multi-phase Clock Generation in 1.2 V, 65 nm CMOS.
VDAT
(2019)