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Charge controlled delay element enabled widely linear power efficient MPCG-MDLL in 1.2V, 65nm CMOS.

Raviteja KammariVijaya Sankara Rao Pasupureddi
Published in: Int. J. Circuit Theory Appl. (2020)
Keyphrases
  • power consumption
  • silicon on insulator
  • genetic algorithm
  • high speed
  • computationally expensive
  • analog vlsi
  • data structure
  • low cost
  • lightweight
  • cost effective
  • power management