Rajiv A. Ravindran

Publication Activity (10 Years)

Years Active: 2001-2007
Publications (10 Years): 0

Publications

Michael L. Chu, Rajiv A. Ravindran, Scott A. Mahlke
Data Access Partitioning for Fine-grain Parallelism on Multicore Architectures. MICRO (2007)
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlke
Compiler-managed partitioned data caches for low power. LCTES (2007)
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh S. Dasika, Eric D. Marsman, Robert M. Senger, Scott A. Mahlke, Richard B. Brown
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache. CGO (2005)
Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown
Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor. IEEE Trans. Computers 54 (8) (2005)
Manjunath Kudlur, Kevin Fan, Michael L. Chu, Rajiv A. Ravindran, Nathan Clark, Scott A. Mahlke
FLASH: Foresighted Latency-Aware Scheduling Heuristic for Processors with Customized Datapaths. CGO (2004)
Michael L. Chu, Kevin Fan, Rajiv A. Ravindran, Scott A. Mahlke
Cost-Sensitive Partitioning in an Architecture Synthesis System for Multicluster Processors. IEEE Micro 24 (3) (2004)
Kevin Fan, Nathan Clark, Michael L. Chu, K. V. Manjunath, Rajiv A. Ravindran, Mikhail Smelyanskiy, Scott A. Mahlke
Systematic Register Bypass Customization for Application-Specific Processors. ASAP (2003)
Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown
Increasing the number of effective registers in a low-power processor using a windowed register file. CASES (2003)
Rajiv A. Ravindran, Rajat Moona
Retargetable Cache Simulation Using High Level Processor Models. ACSAC (2001)
Rajiv A. Ravindran, Rajat Moona
Retargetable Program Profiling Using High Level Processor Models. HiPC (2001)
Scott A. Mahlke, Rajiv A. Ravindran, Michael S. Schlansker, Robert Schreiber, Timothy Sherwood
Bitwidth cognizant architecture synthesis of custom hardwareaccelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (11) (2001)