Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache.
Rajiv A. RavindranPracheeti D. NagarkarGanesh S. DasikaEric D. MarsmanRobert M. SengerScott A. MahlkeRichard B. BrownPublished in: CGO (2005)
Keyphrases
- low power
- low cost
- high speed
- power consumption
- high power
- memory hierarchy
- single chip
- wireless transmission
- vlsi circuits
- code generation
- source code
- logic circuits
- delay insensitive
- general purpose
- power reduction
- gate array
- low density parity check
- low power consumption
- java virtual machine
- vlsi architecture
- digital signal processing
- level parallelism
- wireless communication
- operating system