Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor.
Rajiv A. RavindranRobert M. SengerEric D. MarsmanGanesh S. DasikaMatthew R. GuthausScott A. MahlkeRichard B. BrownPublished in: IEEE Trans. Computers (2005)
Keyphrases
- low power
- high speed
- single chip
- power consumption
- low cost
- gate array
- digital signal processing
- low power consumption
- vlsi architecture
- high power
- vlsi circuits
- windows xp
- logic circuits
- wireless transmission
- operating system
- power reduction
- low density parity check
- real time
- power saving
- delay insensitive
- processor core
- signal processor