Rajamani Sethuram

Publication Activity (10 Years)

Years Active: 2006-2011
Publications (10 Years): 0

Publications

Sandesh Prabhakar, Rajamani Sethuram, Michael S. Hsiao
Trace Buffer-Based Silicon Debug with Lossless Compression. VLSI Design (2011)
Rajamani Sethuram, Karim Arabi, Mohamed H. Abu-Rahma
Leakage power profiling and leakage power reduction using DFT hardware. VTS (2011)
Dheepakkumaran Jayaraman, Rajamani Sethuram, Spyros Tragoudas
Gating internal nodes to reduce power during scan shift. ACM Great Lakes Symposium on VLSI (2010)
Dheepakkumaran Jayaraman, Rajamani Sethuram, Spyros Tragoudas
Scan Shift Power Reduction by Gating Internal Nodes. J. Low Power Electron. 6 (2) (2010)
Rajamani Sethuram, Michael L. Bushnell, Vishwani D. Agrawal
Fault Nodes in Implication Graph for Equivalence/Dominance Collapsing, and Identifying Untestable and Independent Faults. VTS (2008)
Rajamani Sethuram, Omar I. Khan, Hari Vijay Venkatanarayanan, Michael L. Bushnell
A Neural Net Branch Predictor to Reduce Power. VLSI Design (2007)
Rajamani Sethuram, Seongmoon Wang, Srimat T. Chakradhar, Michael L. Bushnell
Zero Cost Test Point Insertion Technique for Structured ASICs. VLSI Design (2007)
Rajamani Sethuram, Seongmoon Wang, Srimat T. Chakradhar, Michael L. Bushnell
Zero Cost Test Point Insertion Technique to Reduce Test Set Size and Test Generation Time for Structured ASICs. ATS (2006)