Pierangelo Terreni

Publication Activity (10 Years)

Years Active: 1990-2014
Publications (10 Years): 0

Top Topics

Distance Transformation

Connected Component Labeling

Topology Preservation

Top Venues

Publications

Daniele Davalle, Berardino Carnevale, Sergio Saponara, Luca Fanucci, Pierangelo Terreni
A Real-Time FPGA-based Solution for Binary Image Thinning. ApplePies (2014)
Federico Baronti, Gabriele Fantechi, Roberto Roncella, Roberto Saletti, Pierangelo Terreni
Hardware building blocks of a hierarchical battery management system for a fuel cell HEV. IECON (2012)
Sergio Saponara, Esa Petri, Luca Fanucci, Pierangelo Terreni
Sensor Modeling, Low-Complexity Fusion Algorithms, and Mixed-Signal IC Prototyping for Gas Measures in Low-Emission Vehicles. IEEE Trans. Instrum. Meas. 60 (2) (2011)
Sergio Saponara, Pierangelo Terreni
Mixed-Signal Architectures for High-Efficiency and Low-Distortion Digital Audio Processing and Power Amplification. EURASIP J. Embed. Syst. 2010 (2010)
Sergio Saponara, Alessandro Forconi, Pierangelo Terreni
Sensor modeling and data fusion for a safety warning system in hydrogen-based vehicles. ROSE (2009)
Antonio Giampà, Esa Petri, Sergio Saponara, Pierangelo Terreni
Sensor modeling and fusion algorithms for NOx measures towards zero emissions vehicles. ROSE (2009)
Sergio Saponara, Esa Petri, Luca Fanucci, Pierangelo Terreni
Smart transducer interface in embedded systems for networked sensors based on the emerging IEEE 1451 Standard: H2 Detection Case Study. WISES (2009)
Pierluigi Nuzzo, Fernando De Bernardinis, Pierangelo Terreni, Geert Van der Plas
Noise Analysis of Regenerative Comparators for Reconfigurable ADC Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2008)
Nicola E. L'Insalata, Sergio Saponara, Luca Fanucci, Pierangelo Terreni
Automatic Synthesis of Cost Effective FFT/IFFT Cores for VLSI OFDM Systems. IEICE Trans. Electron. (4) (2008)
Nicola E. L'Insalata, Sergio Saponara, Luca Fanucci, Pierangelo Terreni
Automatic Generation of Low-Complexity FFT/IFFT Cores for Multi-Band OFDM Systems. DSD (2007)
Sergio Saponara, Luca Fanucci, Pierangelo Terreni
Architectural-Level Power Optimization of Microcontroller Cores in Embedded Systems. IEEE Trans. Ind. Electron. 54 (1) (2007)
Pierluigi Nuzzo, Geert Van der Plas, Fernando De Bernardinis, Liesbet Van der Perre, Bert Gyselinckx, Pierangelo Terreni
A 10.6mW/0.8pJ power-scalable 1GS/s 4b ADC in 0.18mum CMOS with 5.8GHz ERBW. DAC (2006)
Sergio Saponara, Luca Fanucci, Pierangelo Terreni
Oversampled and Noise-Shaped Pulse-Width Modulator for High-Fidelity Digital Audio Amplifier. ICECS (2006)
Sergio Saponara, Pierangelo Terreni
Mixed-signal design of a digital input power amplifier for automotive audio applications. DATE Designers' Forum (2006)
Luca Fanucci, Sergio Saponara, Massimiliano Melani, Pierangelo Terreni
Self-Adaptive Algorithmic/Architectural Design for Real-Time, Low-Power Video Systems. IEICE Trans. Inf. Syst. (7) (2005)
Fernando De Bernardinis, Pierluigi Nuzzo, Pierangelo Terreni, Alberto L. Sangiovanni-Vincentelli
Enriching an analog platform for analog-to-digital converter design. ISCAS (2) (2005)
Sergio Saponara, Massimiliano Melani, Luca Fanucci, Pierangelo Terreni
Adaptive algorithm for fast motion estimation in H.264/MPEG-4 AVC. EUSIPCO (2004)
Sergio Saponara, Luca Fanucci, Pierangelo Terreni
Context-Aware Algorithmic/Architectural Solutions for Real-time Embedded Video Systems. WISES (2004)
Sergio Saponara, Luca Fanucci, Pierangelo Terreni
Design of a Low-Power VLSI Macrocell for Nonlinear Adaptive Video Noise Reduction. EURASIP J. Adv. Signal Process. 2004 (12) (2004)
Fernando De Bernardinis, Luca Fanucci, T. Ramacciotti, Pierangelo Terreni
A QoS Internet Protocol Scheduler on the IXP1200 Network Platform. IWSOC (2003)
Luca Fanucci, Alessandro Renieri, Pierangelo Terreni
VLSI design of a routing switch for the SpaceWire serial link standard. ICECS (2002)
Luca Fanucci, Massimiliano Forliti, Pierangelo Terreni
FAST: FFT ASIC automated synthesis. Integr. 33 (1-2) (2002)
Fernando De Bernardinis, Roberto Roncella, Roberto Saletti, Pierangelo Terreni, Graziano Bertini
An efficient VLSI architecture for real-time additive synthesis of musical signals. IEEE Trans. Very Large Scale Integr. Syst. 7 (1) (1999)
Pietro Andreani, Franco Bigongiari, Roberto Roncella, Roberto Saletti, Pierangelo Terreni, A. Bigongiari, M. Lippi
Multihit multichannel time-to-digital converter with ±1% differential nonlinearity and near optimal time resolution. IEEE J. Solid State Circuits 33 (4) (1998)
Riccardo Mariani, Roberto Roncella, Roberto Saletti, Pierangelo Terreni
On the Realisation of Delay-Insensitive Asynchronous Circuits with CMOS Ternary Logic. ASYNC (1997)
Fernando De Bernardinis, Roberto Roncella, Roberto Saletti, Pierangelo Terreni, Graziano Bertini
A single-chip 1, 200 sinusoid real-time generator for additive synthesis of musical signals. ICASSP (1997)
Fabio Bellifemine, Romualdo Picco, Roberto Roncella, Roberto Saletti, Pierangelo Terreni
A pyramid vector quantizer chip for HDTV applications. Eur. Trans. Telecommun. 8 (2) (1997)
Riccardo Mariani, Roberto Roncella, Roberto Saletti, Pierangelo Terreni
Useful Application of CMOS Ternary Logic to the Realisation of Asynchronous Circuits. ISMVL (1997)
Maurizio Ciampa, Pierangelo Terreni, Mario Poletti
Conditions for the existence and uniqueness of DC solutions of networks containing nonlinear opamps with ideal model. ISCAS (1993)
Maurizio Ciampa, Pierangelo Terreni, Mario Poletti
Linear networks and systems polynomially depending on parameters: Behaviour of the solutions for large and small values. ISCAS (1993)
Maurizio Ciampa, Mario Poletti, Pierangelo Terreni
Linear networks and systems depending polynomially on parameters: Stability for large values subject to tolerance errors. Int. J. Circuit Theory Appl. 21 (3) (1993)
Roberto Roncella, Roberto Saletti, Pierangelo Terreni, Cristiano Toncelli
Single-chip adaptive FIR filter for acoustic echo canceller board. Signal Process. 27 (3) (1992)
Franco Maloberti, Guido Torelli, Claudio Panini, Mauro Troiani, Roberto Roncella, Pierangelo Terreni, Cristiano Toncelli, Roberto Saletti
ASIC-based acoustic echo-canceller board for VME bus. Eur. Trans. Telecommun. 3 (2) (1992)
Roberto Roncella, Roberto Saletti, Pierangelo Terreni
An example of a new VLSI design style based on systolic macrocells: A high-speed single-chip transversal filter for signal processing applications. Eur. Trans. Telecommun. 1 (6) (1990)