Phil C. Knag

Publication Activity (10 Years)

Years Active: 2018-2024
Publications (10 Years): 11

Top Topics

Metal Oxide Semiconductor

Memory Hierarchy

Top Venues

IEEE J. Solid State Circuits

VLSI Technology and Circuits

Publications

Chuan-Tung Lin, Dewei Wang, Bo Zhang, Gregory K. Chen, Phil C. Knag, Ram Kumar Krishnamurthy, Mingoo Seok
DIMCA: An Area-Efficient Digital In-Memory Computing Macro Featuring Approximate Arithmetic Hardware in 28 nm. IEEE J. Solid State Circuits 59 (3) (2024)
Gregory K. Chen, Phil C. Knag, Carlos Tokunaga, Ram K. Krishnamurthy
An Eight-Core RISC-V Processor With Compute Near Last Level Cache in Intel 4 CMOS. IEEE J. Solid State Circuits 58 (4) (2023)
Dewei Wang, Jonghyun Oh, Gregory K. Chen, Phil C. Knag, Ram K. Krishnamurthy, Mingoo Seok
microASR: 32-μW Real-Time Automatic Speech Recognition Chip featuring a Bio-Inspired Neuron Model and Digital SRAM-based Compute-In-Memory Hardware. ESSCIRC (2023)
Gregory K. Chen, Phil C. Knag, Carlos Tokunaga, Ram K. Krishnamurthy
An 8-core RISC-V Processor with Compute near Last Level Cache in Intel 4 CMOS. VLSI Technology and Circuits (2022)
Dewei Wang, Chuan-Tung Lin, Gregory K. Chen, Phil C. Knag, Ram Kumar Krishnamurthy, Mingoo Seok
DIMC: 2219TOPS/W 2569F2/b Digital In-Memory Computing Macro in 28nm Based on Approximate Arithmetic Hardware. ISSCC (2022)
Phil C. Knag, Gregory K. Chen, Huseyin Ekin Sumbul, Raghavan Kumar, Steven K. Hsu, Amit Agarwal, Monodeep Kar, Seongjong Kim, Mark A. Anders, Himanshu Kaul, Ram K. Krishnamurthy
A 617-TOPS/W All-Digital Binary Neural Network Accelerator in 10-nm FinFET CMOS. IEEE J. Solid State Circuits 56 (4) (2021)
Amit Agarwal, Steven Hsu, Simeon Realov, Mark A. Anders, Gregory K. Chen, Monodeep Kar, Raghavan Kumar, Huseyin Sumbul, Phil C. Knag, Himanshu Kaul, Sanu Mathew, Mahesh Kumashikar, Ram Krishnamurthy, Vivek De
25.7 Time-Borrowing Fast Mux-D Scan Flip-Flop with On-Chip Timing/Power/VMIN Characterization Circuits in 10nm CMOS. ISSCC (2020)
Mark A. Anders, Himanshu Kaul, Seongjong Kim, Gregory K. Chen, Raghavan Kumar, Huseyin Ekin Sumbul, Phil C. Knag, Monodeep Kar, Steven K. Hsu, Amit Agarwal, Vikram B. Suresh, Sanu K. Mathew, Ram K. Krishnamurthy, Vivek De
25.9 Reconfigurable Transient Current-Mode Global Interconnect Circuits in 10nm CMOS for High-Performance Processors with Wide Voltage-Frequency Operating Range. ISSCC (2020)
Phil C. Knag, Gregory K. Chen, Huseyin Ekin Sumbul, Raghavan Kumar, Mark A. Anders, Himanshu Kaul, Steven K. Hsu, Amit Agarwal, Monodeep Kar, Seongjong Kim, Ram K. Krishnamurthy
A 617 TOPS/W All Digital Binary Neural Network Accelerator in 10nm FinFET CMOS. VLSI Circuits (2020)
Gregory K. Chen, Raghavan Kumar, Huseyin Ekin Sumbul, Phil C. Knag, Ram K. Krishnamurthy
A 4096-Neuron 1M-Synapse 3.8-pJ/SOP Spiking Neural Network With On-Chip STDP Learning and Sparse Weights in 10-nm FinFET CMOS. IEEE J. Solid State Circuits 54 (4) (2019)
Gregory K. Chen, Raghavan Kumar, Huseyin Ekin Sumbul, Phil C. Knag, Ram K. Krishnamurthy
A 4096-Neuron 1M-Synapse 3.8PJ/SOP Spiking Neural Network with On-Chip STDP Learning and Sparse Weights in 10NM FinFET CMOS. VLSI Circuits (2018)