25.7 Time-Borrowing Fast Mux-D Scan Flip-Flop with On-Chip Timing/Power/VMIN Characterization Circuits in 10nm CMOS.
Amit AgarwalSteven HsuSimeon RealovMark A. AndersGregory K. ChenMonodeep KarRaghavan KumarHuseyin SumbulPhil C. KnagHimanshu KaulSanu MathewMahesh KumashikarRam KrishnamurthyVivek DePublished in: ISSCC (2020)
Keyphrases
- power dissipation
- cmos technology
- power consumption
- nm technology
- flip flops
- low power
- chip design
- silicon on insulator
- power reduction
- digital signal processing
- low voltage
- vlsi circuits
- finite state machines
- mixed signal
- parallel processing
- high speed
- low cost
- analog vlsi
- power management
- signal processing
- circuit design
- design methodology
- cmos image sensor
- computer vision