Paul M. Chau

Publication Activity (10 Years)

Years Active: 1984-2014
Publications (10 Years): 0

Top Topics

Genetic Algorithm

Direction Of Arrival

Top Venues

IEEE Trans. Instrum. Meas.

Publications

Cláudio S. Marino, Paul M. Chau
Constrained Sensor System Resolves Closely Spaced Obscured Low-SNR Sources Using Virtual Beamforming. IEEE Trans. Instrum. Meas. 63 (1) (2014)
Cláudio S. Marino, Paul M. Chau
Low-Level Sinusoidal Signal Detection From a High-Resolution Virtual Spectral Image Using Autoregressive Vector Extrapolation. IEEE Trans. Instrum. Meas. 61 (9) (2012)
Jeanette F. Arrigo, Paul M. Chau
Power aware attitude computation during rapid rotational motion. IEEE Trans. Instrum. Meas. 55 (1) (2006)
David Chih-Che Lin, Paul M. Chau
Objective Human Visual System Based Video Quality Assessment Metric for Low Bit-Rate Video Communication Systems. MMSP (2006)
Laurence Goodby, Alex Orailoglu, Paul M. Chau
Microarchitectural synthesis of performance-constrained, low-power VLSI designs. ACM Trans. Design Autom. Electr. Syst. 7 (1) (2002)
Philip P. Dang, Paul M. Chau
Reduce complexity hardware implementation of discrete wavelet transform for JPEG 2000 standard. ICME (1) (2002)
Philip P. Dang, Paul M. Chau
Hardware/software implementation 3-way algorithm for image encryption. Security and Watermarking of Multimedia Contents (2000)
Philip P. Dang, Paul M. Chau
Image encryption for secure Internet multimedia applications. IEEE Trans. Consumer Electron. 46 (3) (2000)
Philip P. Dang, Paul M. Chau
Robust image transmission over CDMA channels. IEEE Trans. Consumer Electron. 46 (3) (2000)
Philip P. Dang, Paul M. Chau
Image encryption for multimedia applications. CATA (2000)
Amir Sarajedini, Robert Hecht-Nielsen, Paul M. Chau
Conditional probability density function estimation with sigmoidal neural networks. IEEE Trans. Neural Networks 10 (2) (1999)
Philip P. Dang, Paul M. Chau
FPGA architecture for noise filters on a reconfigurable processor. CATA (1999)
Michael B. Bendak, Baernard A. Xavier, Paul M. Chau
A 1.2 GHz CMOS quadrature self-oscillating mixer. ISCAS (5) (1999)
Jeremy Risher, Philip P. Dang, Paul M. Chau
Reconfigurable Hardware for Encryption. Applied Informatics (1999)
Philip P. Dang, Paul M. Chau
A Feature Extraction Application on a Reconfigurable Image Processor. IVCNZ (1998)
Amir Sarajedini, Paul M. Chau
Blind signal separation with a projection pursuit index. ICASSP (1998)
Jeanette F. Arrigo, Kevin J. Page, Paul M. Chau, N. C. Tien
Reconfigurable Processing for Robust Navigation and Control (Abstract). FPGA (1998)
Kevin J. Page, Paul M. Chau
Improved architectures for the add-compare-select operation in long constraint length Viterbi decoding. IEEE J. Solid State Circuits 33 (1) (1998)
Paul M. Chau, Gerald Clark, Anthony V. Sebald
Evolvable Hardware Control for Dynamic Reconfigurable and Adaptive Computing. Evolutionary Programming (1998)
Dan Picker, Ronald D. Fellman, Paul M. Chau
An extension to the SCI flow control protocol for increased network efficiency. IEEE/ACM Trans. Netw. 4 (1) (1996)
Amir Sarajedini, Paul M. Chau
Casasent network density estimation. ICNN (1996)
Takeo Hamada, Chung-Kuan Cheng, Paul M. Chau
A wire length estimation technique utilizing neighborhood density equations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15 (8) (1996)
Yu-jhih Wu, Paul M. Chau, Robert Hecht-Nielsen
A supervised learning neural network coprocessor for soft-decision maximum-likelihood decoding. IEEE Trans. Neural Networks 6 (4) (1995)
Steven S. Watkins, Paul M. Chau, Raoul Tawel, Bjorn H. Lambrigsten
Execution of a remote sensing application on a custom neurocomputer. IEEE Trans. Neural Networks 6 (6) (1995)
Sati Banerjee, Takeo Hamada, Paul M. Chau, Ronald D. Fellman
Macro pipelining based scheduling on high performance heterogeneous multiprocessor systems. IEEE Trans. Signal Process. 43 (6) (1995)
Sati Banerjee, Paul M. Chau, Ronald D. Fellman
Rapid prototyping methodology for multiprocessor implementation of digital signal processing systems. J. VLSI Signal Process. 11 (1-2) (1995)
Laurence Goodby, Alex Orailoglu, Paul M. Chau
Microarchitectural Synthesis of Performance-Constrained, Low-Power VLSI Designs. ICCD (1994)
P. H. Kelly, Kevin J. Page, Paul M. Chau
Rapid Prototyping of ASIC Based Systems. DAC (1994)
Sati Banerjee, Paul M. Chau
Recursive least squares problem implementation on a generalized interconnection of DSP processors. ICASSP (3) (1993)
Dan Picker, Ronald D. Fellman, Paul M. Chau
Enhancing SCI's fairness protocol for increased throughput. ICNP (1993)
Takeo Hamada, Chung-Kuan Cheng, Paul M. Chau
: A Timing-Driven Placement Tool using A Piecewise Linear Resistive Network Approach. DAC (1993)
Steven S. Watkins, Paul M. Chau, Raoul Tawel, Bjorn Lambrigtsen, Mark Plutowski
A Hybrid Radial Basis Function Neurocomputer and Its Applications. NIPS (1993)
Yu-jhih Wu, Michael D. Alston, Paul M. Chau
Dynamic adaptation of quantization thresholds for soft-decision viterbi decoding with a reinforcement learning neural network. J. VLSI Signal Process. 6 (1) (1993)
Paul M. Chau, Sati Banerjee
Parallel implementations of direction finding algorithms on networks of general purpose DSP processors. Integr. 16 (3) (1993)
Takeo Hamada, Sati Banerjee, Paul M. Chau, Ronald D. Fellman
Macropipelining based heterogeneous multiprocessor scheduling. ICASSP (1992)
Takeo Hamada, Chung-Kuan Cheng, Paul M. Chau
A Wire Length Estimation Technique Utilizing Neighborhood Density Equations. DAC (1992)
Paul M. Chau, Scott R. Powell
Power dissipation of VLSI array processing systems. J. VLSI Signal Process. 4 (2-3) (1992)
Scott R. Powell, Paul M. Chau
Sigma-delta encoding for efficient equalization of prefilter based FIR filters. ICASSP (1992)
Scott R. Powell, Paul M. Chau
A technique for realizing linear phase IIR filters. IEEE Trans. Signal Process. 39 (11) (1991)
Amir K. Hekmatpour, Alex Orailoglu, Paul M. Chau
Hierarchical Modeling of the VLSI Design Process. IEEE Expert 6 (2) (1991)
Amir Hekmatpour, Scott R. Powell, Paul M. Chau
KINFIDA: an object-oriented model-based digital filter design assistant. ICASSP (1990)
Michael D. Alston, Paul M. Chau
A neural network architecture for the decoding of long constraint length convolutional codes. IJCNN (1990)
David Rivas, Steven S. Watkins, Paul M. Chau
VLSI for a Physical Model of Musical Instruments Oscillations. ICMC (1989)
Paul M. Chau, Kay-Cheung Chew, Walter H. Ku
A bit-serial floating-point complex multiplier-accumulator for fault-tolerant digital signal processing arrays. ICASSP (1987)
Richard W. Linderman, Peter P. Reusens, Paul M. Chau, Walter H. Ku
Digital signal processing capabilities of CUSP, a high performance bit-serial VLSI processor. ICASSP (1984)