Partha Biswas

Publication Activity (10 Years)

Years Active: 2002-2022
Publications (10 Years): 1

Top Topics

False Positives

Early Diagnosis

Top Venues

Netw. Model. Anal. Health Informatics Bioinform.

Publications

Md. Takim Sarker, Shuvo Saha, Partha Biswas, Md. Tanvir Islam, Mohammad Ashik Sheikh, Md. Nahid Hasan, Nadira Islam, Md. Mobenul Islam Rabbe, Md. Oliullah Rafi
Identification of blood-based inflammatory biomarkers for the early-stage detection of acute myocardial infarction. Netw. Model. Anal. Health Informatics Bioinform. 11 (1) (2022)
Partha Biswas, Girish Venkataramani
Comprehensive isomorphic subtree enumeration. CASES (2008)
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Laura Pozzi, Paolo Ienne
ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement CoRR (2007)
Partha Biswas, Nikil D. Dutt, Laura Pozzi, Paolo Ienne
Introduction of Architecturally Visible Storage in Instruction Set Extensions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (3) (2007)
Aviral Shrivastava, Partha Biswas, Ashok Halambi, Nikil D. Dutt, Alexandru Nicolau
Compilation framework for code size reduction using reduced bit-width ISAs (rISAs). ACM Trans. Design Autom. Electr. Syst. 11 (1) (2006)
Partha Biswas, Nikil D. Dutt, Paolo Ienne, Laura Pozzi
Automatic identification of application-specific functional units with architecturally visible storage. DATE (2006)
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Laura Pozzi, Paolo Ienne
ISEGEN: an iterative improvement-based ISE generation technique for fast customization of processors. IEEE Trans. Very Large Scale Integr. Syst. 14 (7) (2006)
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Paolo Ienne, Laura Pozzi
Performance and Energy Benefits of Instruction Set Extensions in an FPGA Soft Core. VLSI Design (2006)
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Laura Pozzi, Paolo Ienne
ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement. DATE (2005)
Partha Biswas, Nikil D. Dutt
Code Size Reduction in Heterogeneous-Connectivity-Based DSPs Using Instruction Set Extensions. IEEE Trans. Computers 54 (10) (2005)
Partha Biswas, Vinay Choudhary, Kubilay Atasu, Laura Pozzi, Paolo Ienne, Nikil D. Dutt
Introduction of local memory elements in instruction set extensions. DAC (2004)
Partha Biswas, Nikil D. Dutt
Reducing code size for heterogeneous-connectivity-based VLIW DSPs through synthesis of instruction set extensions. CASES (2003)
Alexandru Nicolau, Nikil D. Dutt, Aviral Shrivastava, Partha Biswas, Ashok Halambi
A Design Space Exploration Framework for Reduced Bit-Width Instruction Set Architecture (rISA) Design . ISSS (2002)
Ashok Halambi, Aviral Shrivastava, Partha Biswas, Nikil D. Dutt, Alexandru Nicolau
An Efficient Compiler Technique for Code Size Reduction Using Reduced Bit-Width ISAs. DATE (2002)