Moon-Chul Choi

Publication Activity (10 Years)

Years Active: 2017-2024
Publications (10 Years): 10

Top Topics

Metal Oxide Semiconductor

Feedback Information

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Sung-Yong Cho, Moon-Chul Choi, Jaehyeok Baek, Donggun An, Sanghoon Kim, Daewoong Lee, Seongyeal Yang, Gil-Young Kang, Juseop Park, Kyungho Lee, Hwan-Chul Jung, Gun-hee Cho, ChanYong Lee, Hye-Ran Kim, Yong-Jae Shin, Hanna Park, Sangyong Lee, Jonghyuk Kim, Bokyeon Won, Jungil Mok, Kijin Kim, Unhak Lim, Hong-Jun Jin, YoungSeok Lee, Young-Tae Kim, Heonjoo Ha, Jinchan Ahn, Wonju Sung, Yoontaek Jang, Hoyoung Song, Hyodong Ban, TaeHoon Park, Tae-Young Oh, Changsik Yoo, SangJoon Hwang
13.6 A 16Gb 37Gb/s GDDR7 DRAM with PAM3-Optimized TRX Equalization and ZQ Calibration. ISSCC (2024)
Seungha Roh, Kwangho Lee, Minkyo Shim, Moon-Chul Choi, Deog-Kyoon Jeong
A 64-Gb/s PAM-4 Receiver With Transition-Weighted Phase Detector. IEEE Trans. Circuits Syst. II Express Briefs 69 (9) (2022)
Moon-Chul Choi, Sanghee Lee, Seungha Roh, Kwangho Lee, Jonghyun Oh, Sungwoo Kim, Kwandong Kim, Woo-Seok Choi, Jaeha Kim, Deog-Kyoon Jeong
A 2.5-32 Gb/s Gen 5-PCIe Receiver With Multi-Rate CDR Engine and Hybrid DFE. IEEE Trans. Circuits Syst. II Express Briefs 69 (6) (2022)
Byungjun Kang, Gyu-Seob Jeong, Jeongho Hwang, Kwanseo Park, Hyungrok Do, Hyojun Kim, Han-Gon Ko, Moon-Chul Choi, Deog-Kyoon Jeong
A 10 Gb/s PAM-4 Transmitter With Feed-Forward Implementation of Tomlinson-Harashima Precoding in 28 nm CMOS. IEEE Access 9 (2021)
Seungha Roh, Moon-Chul Choi, Deog-Kyoon Jeong
A Maximum Eye Tracking Clock-and-Data Recovery Scheme with Golden Section Search(GSS) Algorithm in 28-nm CMOS. ISOCC (2021)
Moon-Chul Choi, Han-Gon Ko, Jonghyun Oh, Hye-Yoon Joo, Kwangho Lee, Deog-Kyoon Jeong
A 0.1-pJ/b/dB 28-Gb/s Maximum-Eye Tracking, Weight-Adjusting MM CDR and Adaptive DFE with Single Shared Error Sampler. VLSI Circuits (2020)
Moon-Chul Choi, Deog-Kyoon Jeong, Sung-Yong Cho, Minkyo Shim, Byungmin Kim, Han-Gon Ko, Haram Ju, Kwanseo Park, Hyojun Kim, Kwandong Kim
A 2.5-28 Gb/s Multi-Standard Transmitter With Two-Step Time-Multiplexing Driver. IEEE Trans. Circuits Syst. II Express Briefs (12) (2019)
Moon-Chul Choi, Haram Ju, Han-Gon Ko, Deog-Kyoon Jeong
A Design of Data Path Based on CMOS Logic for a 72-Gb/s PAM-4 Transmitter in 28-nm CMOS. ICEIC (2019)
Haram Ju, Moon-Chul Choi, Gyu-Seob Jeong, Deog-Kyoon Jeong
A 64 GB/s 1.5 PJ/Bit PAM-4 Transmitter with 3-Tap FFE and GM-Regulated Active-Feedback Driver in 28 NM CMOS. VLSI Circuits (2018)
Haram Ju, Moon-Chul Choi, Gyu-Seob Jeong, Woo-Rham Bae, Deog-Kyoon Jeong
-Regulated Resistive-Feedback Driver. IEEE Trans. Circuits Syst. II Express Briefs (12) (2017)