Mohsen Saneei

Publication Activity (10 Years)

Years Active: 2005-2021
Publications (10 Years): 7

Top Topics

Cmos Technology

Quantization Noise

Top Venues

Int. J. Circuit Theory Appl.

IET Circuits Devices Syst.

J. Circuits Syst. Comput.

Microelectron. J.

Publications

Sanaz Salem, Mohsen Saneei, Dariush Abbasi-Moghadam
Evaluation of multi-level Bang-Bang phase detector with metastability effect using Markov chain. Microelectron. J. 115 (2021)
Sanaz Salem, Mohsen Saneei, Dariush Abbasi-Moghadam
Jitter Modeling in Digital CDR with Quantization Noise Analysis. Circuits Syst. Signal Process. 40 (8) (2021)
Sanaz Salem, Mohsen Saneei, Dariush Abbasi-Moghadam
Jitter and metastability analysis and modeling of multilevel bang-bang phase detector. Int. J. Circuit Theory Appl. 48 (8) (2020)
Ramin Razmdideh, Mohsen Saneei
All-digital delay line-based time difference amplifier in 65 nm CMOS technology. IET Circuits Devices Syst. 13 (4) (2019)
Shirin Askari, Mohsen Saneei
Design and analysis of differential ring voltage controlled oscillator for wide tuning range and low power applications. Int. J. Circuit Theory Appl. 47 (2) (2019)
Ramin Razmdideh, Mohsen Saneei
Low-power, latch-based multistage time-to-digital converter in 65 nm CMOS technology. Int. J. Circuit Theory Appl. 46 (6) (2018)
Sanaz Salem, Hamed Zandevakili, Ali Mahani, Mohsen Saneei
Fault-tolerant delay cell for ring oscillator application in 65 nm CMOS technology. IET Circuits Devices Syst. 12 (3) (2018)
Ramin Razmdideh, Mohsen Saneei
A novel low power and high speed double edge explicit pulse triggered level converter flip-flop. Int. J. Circuit Theory Appl. 43 (4) (2015)
Asma Dehghani, Mohsen Saneei, Ali Mahani
Time-to-digital convertor based on resolution control. IET Circuits Devices Syst. 9 (5) (2015)
Ramin Razmdideh, Ali Mahani, Mohsen Saneei
New Design of Scan Flip-Flop to Increase Speed and Reduce Power Consumption. J. Circuits Syst. Comput. 24 (10) (2015)
Ramin Razmdideh, Mohsen Saneei
Two novel low power and very high speed pulse triggered flip-flops. Int. J. Circuit Theory Appl. 43 (12) (2015)
Hamed Zandevakili, Ali Mahani, Mohsen Saneei
Probabilistic Transfer Matrix with mixed Binary-Decimal Coding for Logic Circuit Reliability Analysis. J. Circuits Syst. Comput. 22 (8) (2013)
Mohsen Saneei, Ali Afzali-Kusha, Zainalabedin Navabi
Sign Bit Reduction Encoding For Low Power Applications. J. Signal Process. Syst. 57 (3) (2009)
Hadi Parandeh-Afshar, Mohsen Saneei, Ali Afzali-Kusha, Massoud Pedram
Fast INC-XOR codec for low-power address buses. IET Comput. Digit. Tech. 1 (5) (2007)
Mohsen Saneei, Ali Afzali-Kusha, Zainalabedin Navabi
Low-power and low-latency cluster topology for local traffic NoCs. ISCAS (2006)
Mohsen Saneei, Ali Afzali-Kusha, Zainalabedin Navabi
Serial Bus Encoding for Low Power Application. SoC (2006)
Mohsen Saneei, Ali Afzali-Kusha, Zainalabedin Navabi
Sign bit reduction encoding for low power applications. DAC (2005)