Low-power, latch-based multistage time-to-digital converter in 65 nm CMOS technology.
Ramin RazmdidehMohsen SaneeiPublished in: Int. J. Circuit Theory Appl. (2018)
Keyphrases
- embedded systems
- low power
- cmos technology
- multistage
- low cost
- low voltage
- mixed signal
- power consumption
- analog to digital converter
- high speed
- dynamic programming
- cmos image sensor
- single chip
- low power consumption
- digital signal processing
- power dissipation
- image sensor
- digital images
- digital camera
- power reduction
- nm technology
- flip flops
- power management
- silicon on insulator