New Design of Scan Flip-Flop to Increase Speed and Reduce Power Consumption.
Ramin RazmdidehAli MahaniMohsen SaneeiPublished in: J. Circuits Syst. Comput. (2015)
Keyphrases
- power consumption
- power dissipation
- low power
- cmos technology
- low power consumption
- flip flops
- power reduction
- nm technology
- energy efficiency
- power saving
- high speed
- low cost
- energy saving
- power management
- digital signal processing
- save energy
- data center
- real time
- signal processing
- battery powered
- pattern recognition
- clock gating