Mohammad Moradinezhad Maryan

Publication Activity (10 Years)

Years Active: 2017-2024
Publications (10 Years): 8

Top Topics

Power Reduction

Digital Signal Processing

Top Venues

J. Circuits Syst. Comput.

Comput. Electr. Eng.

Microelectron. J.

Publications

Mohammad Moradinezhad Maryan, Seyed Javad Azhari
Low-Leakage Double-Body MOSFET: A Promising Circuit-Level Technique for Deep-Submicron Analog Integrated Circuit Design. J. Circuits Syst. Comput. 33 (8) (2024)
Mohammad Moradinezhad Maryan, Seyed Javad Azhari, Majid Amini Valashani
A self-control leakage-suppression block for low-power high-efficient static logic circuit design in 22 nm CMOS process. Integr. 87 (2022)
Mohammad Moradinezhad Maryan, Majid Amini Valashani, Seyed Javad Azhari
An input controlled leakage restrainer transistor-based technique for leakage and short-circuit power reduction of 1-bit hybrid full adders. Int. J. Circuit Theory Appl. 49 (8) (2021)
Mohammad Moradinezhad Maryan, Majid Amini Valashani, Seyed Javad Azhari
A New Circuit-Level Technique for Leakage and Short-Circuit Power Reduction of Static Logic Gates in 22-nm CMOS Technology. Circuits Syst. Signal Process. 40 (7) (2021)
Mohammad Moradinezhad Maryan, Seyed Javad Azhari, Mehdi Ayat, Reza Rezaei Siahrood
Compact Design of High-Speed Low-Error Four-Quadrant Current Multiplier with Reduced Power Dissipation. J. Circuits Syst. Comput. 29 (3) (2020)
Mohammad Moradinezhad Maryan, Reza Rezaei Siahrood, Seyed Javad Azhari, Abdolreza Rahmati
A high-precision current-mode multifunction analog cell suitable for computational signal processing. Integr. 70 (2020)
Mohammad Moradinezhad Maryan, Seyed Javad Azhari
CMOS design of computational current-mode static and dynamic functions based on analog translinear cell. Comput. Electr. Eng. 68 (2018)
Mohammad Moradinezhad Maryan, Seyed Javad Azhari
Ultra low-power low-voltage FGMOS based-configurable analog block for current-mode fractional-power functions. Microelectron. J. 64 (2017)