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Ming-Yu Tsai
Publication Activity (10 Years)
Years Active: 2002-2023
Publications (10 Years): 1
Top Topics
Wavelet Packet Decomposition
Cluster Head
Image Recognition
Pavement Distress
Top Venues
FiCloud
BCD
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Publications
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Chuin-Mu Wang
,
Shao Wei Chu
,
Yen-Ching Wu
,
Jia-Xian Jian
,
Ming-Yu Tsai
,
Meng-Fen Huang
Image Recognition Technology for Abnormal Capsule Detection.
BCD
(2023)
Ming-Yu Tsai
,
Yaw-Chung Chen
A Virtual Cluster Head Election Scheme for Energy-Efficient Routing in Wireless Sensor Networks.
FiCloud
(2015)
Tso-Bing Juang
,
Chin-Chieh Chiu
,
Ming-Yu Tsai
+ 1 Adder Design With Simple Correction Schemes.
IEEE Trans. Circuits Syst. II Express Briefs
(3) (2010)
Shen-Fu Hsiao
,
Ming-Yu Tsai
,
Chia-Sheng Wen
Low Area/Power Synthesis Using Hybrid Pass Transistor/CMOS Logic Cells in Standard Cell-Based Design Environment.
IEEE Trans. Circuits Syst. II Express Briefs
(1) (2010)
Tso-Bing Juang
,
Ming-Yu Tsai
,
Chin-Chieh Chiu
+ 1 Adder Using Circular Carry Selection" [Sep 08 897-901].
IEEE Trans. Circuits Syst. II Express Briefs
(3) (2009)
Shen-Fu Hsiao
,
Hsin-Mau Lee
,
Yen-Chun Cheng
,
Ming-Yu Tsai
Efficient designs of flaoting-point CORDIC rotation and vectoring operations.
APCCAS
(2008)
Shen-Fu Hsiao
,
Ming-Yu Tsai
,
Chia-Sheng Wen
Area oriented pass-transistor logic synthesis using buffer elimination and layout compaction.
ISCAS
(2008)
Shen-Fu Hsiao
,
Yo-Chi Chen
,
Ming-Yu Tsai
,
Tze-Chong Cheng
Novel Memory Organization and Circuit Designs for Efficient Data Access in Applications of 3D Graphics and Multimedia Coding.
MTDT
(2006)
Shen-Fu Hsiao
,
Sze-Yun Lin
,
Tze-Chong Cheng
,
Ming-Yu Tsai
An Automatic Cache Generator Based on Content-Addressable Memory.
APCCAS
(2006)
Shen-Fu Hsiao
,
Ming-Yu Tsai
,
Chia-Sheng Wen
Efficient Pass-Transistor-Logic Synthesis for Sequential Circuits.
APCCAS
(2006)
Tso-Bing Juang
,
Shen-Fu Hsiao
,
Ming-Yu Tsai
,
Jenq-Shiun Jan
A Cell-Driven Multiplier Generator with Delay Optimization of Partial Products Compression and an Efficient Partition Technique for the Final Addition.
IEICE Trans. Inf. Syst.
(7) (2005)
Shen-Fu Hsiao
,
Ming-Yu Tsai
,
Ming-Chih Chen
,
Chia-Sheng Wen
An efficient pass-transistor-logic synthesizer using multiplexers and inverters only.
ISCAS (3)
(2005)
Ming-Yu Tsai
,
Li-Chen Fu
,
Ta-Chiun Chou
Automatic Negotiation with Mediated Agents in E-commerce Marketplace.
EEE
(2005)
Shun-Fa Chang
,
Li-Chen Fu
,
Ming-Yu Tsai
Automatic Integration of Inter-Enterprise Processes with Hierarchical Broker Framework.
ICEIS (4)
(2004)
Tso-Bing Juang
,
Shen-Fu Hsiao
,
Ming-Yu Tsai
Para-CORDIC: parallel CORDIC rotation algorithm.
IEEE Trans. Circuits Syst. I Regul. Pap.
(8) (2004)
Tso-Bing Juang
,
Jeng-Hsiun Jan
,
Ming-Yu Tsai
,
Shen-Fu Hsiao
Partition methodology for the final adder in a tree-structure parallel multiplier generator.
APCCAS (1)
(2002)