Mehul Tikekar

Publication Activity (10 Years)

Years Active: 2010-2020
Publications (10 Years): 4

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Very Large Scale Integr. Syst.

ICIP

CoRR

Massachusetts Institute of Technology, Cambridge, USA (PHD)

Education History

Massachusetts Institute of Technology, Cambridge, USA

PHD

Publications

Albert Gural, Phillip Nadeau, Mehul Tikekar, Boris Murmann
Low-Rank Training of Deep Neural Networks for Emerging Memory Technology. CoRR (2020)
Mehul Tikekar, Vivienne Sze, Anantha P. Chandrakasan
A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices. IEEE J. Solid State Circuits 53 (8) (2018)
Priyanka Raina, Mehul Tikekar, Anantha P. Chandrakasan
An Energy-Scalable Accelerator for Blind Image Deblurring. IEEE J. Solid State Circuits 52 (7) (2017)
Priyanka Raina, Mehul Tikekar, Anantha P. Chandrakasan
An energy-scalable accelerator for blind image deblurring. ESSCIRC (2016)
Chao-Tsung Huang, Mehul Tikekar, Anantha P. Chandrakasan
Memory-Hierarchical and Mode-Adaptive HEVC Intra Prediction Architecture for Quad Full HD Video Decoding. IEEE Trans. Very Large Scale Integr. Syst. 22 (7) (2014)
Mehul Tikekar, Chao-Tsung Huang, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan
A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications. IEEE J. Solid State Circuits 49 (1) (2014)
Mehul Tikekar, Chao-Tsung Huang, Vivienne Sze, Anantha P. Chandrakasan
Energy and area-efficient hardware implementation of HEVC inverse transform and dequantization. ICIP (2014)
Chao-Tsung Huang, Mehul Tikekar, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan
A 249Mpixel/s HEVC video-decoder chip for Quad Full HD applications. ISSCC (2013)
Masood Qazi, Mehul Tikekar, Lara Dolecek, Devavrat Shah, Anantha P. Chandrakasan
Technique for Efficient Evaluation of SRAM Timing Failure. IEEE Trans. Very Large Scale Integr. Syst. 21 (8) (2013)
Chao-Tsung Huang, Chiraag Juvekar, Mehul Tikekar, Anantha P. Chandrakasan
HEVC interpolation filter architecture for quad full HD decoding. VCIP (2013)
Masood Qazi, Mehul Tikekar, Lara Dolecek, Devavrat Shah, Anantha P. Chandrakasan
Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis. DATE (2010)

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Publication Activity (10 Years)

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Mehul Tikekar