Chiraag Juvekar

Publication Activity (10 Years)

Years Active: 2013-2023
Publications (10 Years): 22

Top Topics

Power Allocation

Top Venues

IEEE J. Solid State Circuits

IACR Cryptol. ePrint Arch.

Publications

Rashmi Agrawal, Leo de Castro, Chiraag Juvekar, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Ajay Joshi
MAD: Memory-Aware Design Techniques for Accelerating Fully Homomorphic Encryption. MICRO (2023)
Rashmi Agrawal, Leo de Castro, Guowei Yang, Chiraag Juvekar, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Ajay Joshi
FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption. HPCA (2023)
Rashmi Agrawal, Leo de Castro, Guowei Yang, Chiraag Juvekar, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Ajay Joshi
FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption. CoRR (2022)
Arslan Riaz, Dylan Nash, Jonathan Ngo, Chiraag Juvekar, Phillip M. Nadeau, Tao Yu, Rabia Tugce Yazicigil
Security Assessment of Phase-Based Ranging Systems in a Multipath Environment. ACM J. Emerg. Technol. Comput. Syst. 18 (4) (2022)
Leo de Castro, Chiraag Juvekar, Vinod Vaikuntanathan
Fast Vector Oblivious Linear Evaluation from Ring Learning with Errors. WAHC@CCS (2021)
Leo de Castro, Rashmi Agrawal, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Chiraag Juvekar, Ajay Joshi
Does Fully Homomorphic Encryption Need Compute Acceleration? IACR Cryptol. ePrint Arch. 2021 (2021)
Leo de Castro, Rashmi Agrawal, Rabia Tugce Yazicigil, Anantha P. Chandrakasan, Vinod Vaikuntanathan, Chiraag Juvekar, Ajay Joshi
Does Fully Homomorphic Encryption Need Compute Acceleration? CoRR (2021)
Leo de Castro, Chiraag Juvekar, Vinod Vaikuntanathan
Fast Vector Oblivious Linear Evaluation from Ring Learning with Errors. IACR Cryptol. ePrint Arch. 2020 (2020)
Utsav Banerjee, Andrew Wright, Chiraag Juvekar, Madeleine Waller, Arvind, Anantha P. Chandrakasan
An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for Securing Internet-of-Things Applications. CoRR (2019)
Nick Moran, Chiraag Juvekar
Reconstructing Network Inputs with Additive Perturbation Signatures. CoRR (2019)
Utsav Banerjee, Chiraag Juvekar, Andrew Wright, Arvind, Anantha P. Chandrakasan
An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for End-to-End Security in IoT Applications. CoRR (2019)
Utsav Banerjee, Andrew Wright, Chiraag Juvekar, Madeleine Waller, Arvind, Anantha P. Chandrakasan
An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for Securing Internet-of-Things Applications. IEEE J. Solid State Circuits 54 (8) (2019)
Chiraag Juvekar, Anantha P. Chandrakasan, Joyce Kwong, Hyung-Min Lee
A nonvolatile flip-flop-enabled cryptographic wireless authentication tag with per-query key update and power-glitch attack countermeasures. ASP-DAC (2018)
Chiraag Juvekar, Vinod Vaikuntanathan, Anantha P. Chandrakasan
GAZELLE: A Low Latency Framework for Secure Neural Network Inference. USENIX Security Symposium (2018)
Nachiket V. Desai, Chiraag Juvekar, Shubham Chandak, Anantha P. Chandrakasan
An Actively Detuned Wireless Power Receiver With Public Key Cryptographic Authentication and Dynamic Power Allocation. IEEE J. Solid State Circuits 53 (1) (2018)
Chiraag Juvekar, Vinod Vaikuntanathan, Anantha P. Chandrakasan
Gazelle: A Low Latency Framework for Secure Neural Network Inference. CoRR (2018)
Chiraag Juvekar, Vinod Vaikuntanathan, Anantha P. Chandrakasan
GAZELLE: A Low Latency Framework for Secure Neural Network Inference. IACR Cryptol. ePrint Arch. 2018 (2018)
Utsav Banerjee, Chiraag Juvekar, Andrew Wright, Arvind, Anantha P. Chandrakasan
An energy-efficient reconfigurable DTLS cryptographic engine for End-to-End security in iot applications. ISSCC (2018)
Nachiket V. Desai, Chiraag Juvekar, Shubham Chandak, Anantha P. Chandrakasan
21.8 An actively detuned wireless power receiver with public key cryptographic authentication and dynamic power allocation. ISSCC (2017)
Hyung-Min Lee, Chiraag Juvekar, Joyce Kwong, Anantha P. Chandrakasan
A Nonvolatile Flip-Flop-Enabled Cryptographic Wireless Authentication Tag With Per-Query Key Update and Power-Glitch Attack Countermeasures. IEEE J. Solid State Circuits 52 (1) (2017)
Utsav Banerjee, Chiraag Juvekar, Samuel H. Fuller, Anantha P. Chandrakasan
eeDTLS: Energy-Efficient Datagram Transport Layer Security for the Internet of Things. GLOBECOM (2017)
Chiraag Juvekar, Hyung-Min Lee, Joyce Kwong, Anantha P. Chandrakasan
16.2 A Keccak-based wireless authentication tag with per-query key update and power-glitch attack countermeasures. ISSCC (2016)
Mehul Tikekar, Chao-Tsung Huang, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan
A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications. IEEE J. Solid State Circuits 49 (1) (2014)
Chao-Tsung Huang, Mehul Tikekar, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan
A 249Mpixel/s HEVC video-decoder chip for Quad Full HD applications. ISSCC (2013)
Chao-Tsung Huang, Chiraag Juvekar, Mehul Tikekar, Anantha P. Chandrakasan
HEVC interpolation filter architecture for quad full HD decoding. VCIP (2013)