Samuel H. Fuller

Publication Activity (10 Years)

Years Active: 1972-2023
Publications (10 Years): 6

Top Topics

Countermeasures

Factor Authentication

Power Consumption

Top Venues

Publications

Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Anantha P. Chandrakasan
A Threshold Implementation-Based Neural Network Accelerator With Power and Electromagnetic Side-Channel Countermeasures. IEEE J. Solid State Circuits 58 (1) (2023)
Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Anantha P. Chandrakasan
A ThreshoId-ImpIementation-Based Neural-Network Accelerator Securing Model Parameters and Inputs Against Power Side-Channel Attacks. ISSCC (2022)
Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Rabia Tugce Yazicigil, Anantha P. Chandrakasan
Securing Embedded Medical Devices using Dual-Factor Authentication. CBMS (2021)
Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Mohamed R. Abdelhamid, Phillip M. Nadeau, Rabia Tugce Yazicigil, Anantha P. Chandrakasan
A Low-Power Dual-Factor Authentication Unit for Secure Implantable Devices. CoRR (2020)
Saurav Maji, Utsav Banerjee, Samuel H. Fuller, Mohamed R. Abdelhamid, Phillip M. Nadeau, Rabia Tugce Yazicigil, Anantha P. Chandrakasan
A Low-Power Dual-Factor Authentication Unit for Secure Implantable Devices. CICC (2020)
Utsav Banerjee, Chiraag Juvekar, Samuel H. Fuller, Anantha P. Chandrakasan
eeDTLS: Energy-Efficient Datagram Transport Layer Security for the Internet of Things. GLOBECOM (2017)
Samuel H. Fuller, Lynette I. Millett
Computing Performance: Game Over or Next Level? Computer 44 (1) (2011)
Gordon Bell, Samuel H. Fuller, Daniel P. Siewiorek
Forword to the Special Issue on Computer Architecture. Commun. ACM 21 (1) (1978)
Samuel H. Fuller, Patrick F. McGehearty
Minimizing Latency in CCD Memories. IEEE Trans. Computers 27 (3) (1978)
Madhav V. Marathe, Samuel H. Fuller
A Study of Multiprocessor Contention for Shared Data in C.MMP. Int. CMG Conference (1977)
Samuel H. Fuller, Harold S. Stone, William E. Burr
Initial selection and screening of the CFA candidate computer architectures. AFIPS National Computer Conference (1977)
Samuel H. Fuller, William E. Burr
Measurement and Evaluation of Alternative Computer Architectures. Computer 10 (10) (1977)
T. M. McWilliams, Samuel H. Fuller, W. H. Sherwood
Using LSI processor bit-slices to build a PDP-11: a case study in microcomputer design. AFIPS National Computer Conference (1977)
Samuel H. Fuller, Paul Shaman, David Lamb, William E. Burr
Evaluation of computer architectures via test programs. AFIPS National Computer Conference (1977)
Richard J. Swan, Samuel H. Fuller, Daniel P. Siewiorek
Cm*: a modular, multi-microprocessor. AFIPS National Computer Conference (1977)
Samuel H. Fuller, G. A. Mathew
Implementing microprogram storage with PLA's. SIGARCH Comput. Archit. News 5 (2) (1976)
Samuel H. Fuller
Price/Performance Comparison of C.mmp and the PDP-10. ISCA (1976)
Philip L. Karlton, Samuel H. Fuller, R. E. Scroggs, E. B. Kaehler
Performance of Height-Balanced Trees. Commun. ACM 19 (1) (1976)
Samuel H. Fuller, Daniel P. Siewiorek, Richard J. Swan
The Design of a Multi-Micro-Computer System. ISCA (1976)
Samuel H. Fuller, Victor R. Lesser, Gordon Bell, Charles H. Kaman
The Effects of Emerging Technology and Emulation Requirements on Microprogramming. IEEE Trans. Computers 25 (10) (1976)
Samuel H. Fuller, Daniel P. Siewiorek, Richard J. Swan
Computer modules - an architecture for a modular multi-microprocessor. ACM Annual Conference (1975)
Samuel H. Fuller, Forest Baskett
An Analysis of Drum Storage Units. J. ACM 22 (1) (1975)
George E. Rossmann, Michael J. Flynn, Samuel H. Fuller, C. Gordon Bell, Frederick P. Brooks Jr., Herbert Hellerman
A Course of Study in Computer Hardware Architecture. Computer 8 (12) (1975)
Samuel H. Fuller, Victor R. Lesser, Gordon C. Bell, Charles H. Kaman
Microprogramming and its relationship to emulation and technology. MICRO (1974)
Samuel H. Fuller
Minimal-Total-Processing Time Drum and Disk Scheduling Disciplines. Commun. ACM 17 (7) (1974)
Donald D. Chamberlin, Samuel H. Fuller, Leonard Y. Liu
A Page Allocation Strategy for Multiprogramming Systems with Virtual Memory. SOSP (1973)
Dileep Bhandarkar, Samuel H. Fuller
Markov Chain Models for Analyzing Memory Interference in Multiprocessor Computer Systems. ISCA (1973)
Samuel H. Fuller
Random Arrival and the MTPT Drum Scheduling Discipline. SOSP (1973)
Harold S. Stone, Samuel H. Fuller
On the Near-Optimality of the Shortest-Latency-Time-First Drum Scheduling Discipline. Commun. ACM 16 (6) (1973)
Samuel H. Fuller, Daniel P. Siewiorek
Some observations on semiconductor technology and the architecture of large digital modules. Computer 6 (10) (1973)
Samuel H. Fuller
Performance of an I/O channel with multiple paging drums. SIGME (1973)
Samuel H. Fuller, Daniel P. Siewiorek, Richard J. Swan
Computer Modules: An Architecture for Large Digital Modules. ISCA (1973)
Samuel H. Fuller
An Optimal Drum Scheduling Algorithm. IEEE Trans. Computers 21 (11) (1972)