A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications.
Mehul TikekarChao-Tsung HuangChiraag JuvekarVivienne SzeAnantha P. ChandrakasanPublished in: IEEE J. Solid State Circuits (2014)
Keyphrases
- video decoder
- video codec
- memory subsystem
- high speed
- low power consumption
- video coding
- low power
- rate distortion
- video quality
- motion compensation
- inter frame
- motion compensated
- low bit rate
- video compression
- transform domain
- low cost
- bitstream
- bit rate
- macroblock
- motion estimation
- real time
- frame rate
- video conferencing
- motion vectors
- single chip
- motion field
- power consumption