Marleson Graf

Publication Activity (10 Years)

Years Active: 2016-2023
Publications (10 Years): 6

Top Topics

Symbolic Execution

Parallel Architecture

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Marleson Graf, Gabriel A. G. Andrade, Luiz C. V. dos Santos
EveCheck: An Event-Driven, Scalable Algorithm for Coherent Shared Memory Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (2) (2023)
Gabriel A. G. Andrade, Marleson Graf, Luiz C. V. dos Santos
Chaining and Biasing: Test Generation Techniques for Shared-Memory Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (3) (2020)
Gabriel A. G. Andrade, Marleson Graf, Nícolas Pfeifer, Luiz C. V. dos Santos
A Directed Test Generator for Shared-Memory Verification of Multicore Chip Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (12) (2020)
Marleson Graf, Olav P. Henschel, Rafael P. Alevato, Luiz C. V. dos Santos
Spec&Check: An Approach to the Building of Shared-Memory Runtime Checkers for Multicore Chip Design Verification. ICCAD (2019)
Gabriel A. G. Andrade, Marleson Graf, Nícolas Pfeifer, Luiz C. V. dos Santos
Steep coverage-ascent directed test generation for shared-memory verification of multicore chips. ICCAD (2018)
Gabriel A. G. Andrade, Marleson Graf, Luiz C. V. dos Santos
Chain-based pseudorandom tests for pre-silicon verification of CMP memory systems. ICCD (2016)