A Directed Test Generator for Shared-Memory Verification of Multicore Chip Designs.
Gabriel A. G. AndradeMarleson GrafNícolas PfeiferLuiz C. V. dos SantosPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2020)
Keyphrases
- shared memory
- parallel algorithm
- message passing
- parallel computing
- multithreading
- multi processor
- memory access
- parallel programming
- distributed memory
- low cost
- parallel computation
- parallel architecture
- parallel architectures
- parallel execution
- parallel machines
- address space
- high quality
- belief propagation
- interprocess communication
- shared memory multiprocessors