Spec&Check: An Approach to the Building of Shared-Memory Runtime Checkers for Multicore Chip Design Verification.
Marleson GrafOlav P. HenschelRafael P. AlevatoLuiz C. V. dos SantosPublished in: ICCAD (2019)
Keyphrases
- shared memory
- chip design
- message passing
- parallel algorithm
- distributed memory
- parallel computing
- parallel programming
- parallel computation
- shared memory multiprocessors
- parallel machines
- belief propagation
- model checking
- higher order
- address space
- image processing
- design methodology
- markov random field
- physical design
- transactional memory
- database