Lei Yang

Publication Activity (10 Years)

Years Active: 2014-2024
Publications (10 Years): 45

Top Topics

Heterogeneous Systems

Neural Architecture

Priority Scheduling

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Yi Sheng, Hanchen Wang, Yipei Liu, Junhuan Yang, Weiwen Jiang, Youzuo Lin, Lei Yang
APS-USCT: Ultrasound Computed Tomography on Sparse Data via AI-Physic Synergy. CoRR (2024)
Yi Sheng, Junhuan Yang, Jinyang Li, James Alaina, Xiaowei Xu, Yiyu Shi, Jingtong Hu, Weiwen Jiang, Lei Yang
Data-Algorithm-Architecture Co-Optimization for Fair Neural Networks on Skin Lesion Dataset. CoRR (2024)
Yi Sheng, Junhuan Yang, Youzuo Lin, Weiwen Jiang, Lei Yang
Toward Fair Ultrasound Computing Tomography: Challenges, Solutions and Outlook. ACM Great Lakes Symposium on VLSI (2024)
Shengjie Xu, Clara Hobbs, Yukai Song, Bineet Ghosh, Sharmin Aktar, Lei Yang, Yi Sheng, Weiwen Jiang, Jingtong Hu, Parasara Sridhar Duggirala, Samarjit Chakraborty
Poster Abstract: Neural Architecture Sizing for Autonomous Systems. ICCPS (2024)
Junhuan Yang, Yi Sheng, Yuzhou Zhang, Weiwen Jiang, Lei Yang
On-Device Unsupervised Image Segmentation. DAC (2023)
Yuhong Song, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Rui Xu, Xiaowei Xu, Bingzhe Li, Lei Yang
Hardware-aware neural architecture search for stochastic computing-based neural networks on tiny devices. J. Syst. Archit. 135 (2023)
Peng Chen, Weichen Liu, Hui Chen, Shiqing Li, Mengquan Li, Lei Yang, Nan Guan
Reduced Worst-Case Communication Latency Using Single-Cycle Multihop Traversal Network-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (7) (2021)
Weiwen Jiang, Qiuwen Lou, Zheyu Yan, Lei Yang, Jingtong Hu, Xiaobo Sharon Hu, Yiyu Shi
Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators. IEEE Trans. Computers 70 (4) (2021)
Weiwen Jiang, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Lei Yang, Hailiang Dong, Xianzhang Chen
On the Design of Minimal-Cost Pipeline Systems Satisfying Hard/Soft Real-Time Constraints. IEEE Trans. Emerg. Top. Comput. 9 (1) (2021)
Mengquan Li, Weichen Liu, Luan H. K. Duong, Peng Chen, Lei Yang, Chunhua Xiao
Contention-Aware Routing for Thermal-Reliable Optical Networks-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (2) (2021)
Lei Yang, Zheyu Yan, Meng Li, Hyoukjun Kwon, Liangzhen Lai, Tushar Krishna, Vikas Chandra, Weiwen Jiang, Yiyu Shi
Co-Exploration of Neural Architectures and Heterogeneous ASIC Accelerator Designs Targeting Multiple Tasks. DAC (2020)
Weiwen Jiang, Lei Yang, Sakyasingha Dasgupta, Jingtong Hu, Yiyu Shi
Standing on the Shoulders of Giants: Hardware and Neural Architecture Co-Search with Hot Start. CoRR (2020)
Weiwen Jiang, Lei Yang, Sakyasingha Dasgupta, Jingtong Hu, Yiyu Shi
Standing on the Shoulders of Giants: Hardware and Neural Architecture Co-Search With Hot Start. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (11) (2020)
Peng Chen, Weichen Liu, Mengquan Li, Lei Yang, Nan Guan
Contention Minimized Bypassing in SMART NoC. ASP-DAC (2020)
Lei Yang, Zheyu Yan, Meng Li, Hyoukjun Kwon, Liangzhen Lai, Tushar Krishna, Vikas Chandra, Weiwen Jiang, Yiyu Shi
Co-Exploration of Neural Architectures and Heterogeneous ASIC Accelerator Designs Targeting Multiple Tasks. CoRR (2020)
Lei Yang, Weiwen Jiang, Weichen Liu, Edwin H.-M. Sha, Yiyu Shi, Jingtong Hu
Co-Exploring Neural Architecture and Network-on-Chip Design for Real-Time Artificial Intelligence. ASP-DAC (2020)
Weiwen Jiang, Lei Yang, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Shouzhen Gu, Sakyasingha Dasgupta, Yiyu Shi, Jingtong Hu
Hardware/Software Co-Exploration of Neural Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (12) (2020)
Weiwen Jiang, Xinyi Zhang, Edwin Hsing-Mean Sha, Lei Yang, Qingfeng Zhuge, Yiyu Shi, Jingtong Hu
Accuracy vs. Efficiency: Achieving Both through FPGA-Implementation Aware Neural Architecture Search. CoRR (2019)
Weiwen Jiang, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Lei Yang, Xianzhang Chen, Jingtong Hu
On the Design of Time-Constrained and Buffer-Optimal Self-Timed Pipelines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (8) (2019)
Mengquan Li, Weichen Liu, Lei Yang, Peng Chen, Duo Liu, Nan Guan
Routing in optical network-on-chip: minimizing contention with guaranteed thermal reliability. ASP-DAC (2019)
Weiwen Jiang, Xinyi Zhang, Edwin Hsing-Mean Sha, Lei Yang, Qingfeng Zhuge, Yiyu Shi, Jingtong Hu
Accuracy vs. Efficiency: Achieving Both through FPGA-Implementation Aware Neural Architecture Search. DAC (2019)
Weiwen Jiang, Xinyi Zhang, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Lei Yang, Yiyu Shi, Jingtong Hu
XFER: A Novel Design to Achieve Super-Linear Performance on Multiple FPGAs for Real-Time AI. FPGA (2019)
Weiwen Jiang, Edwin H.-M. Sha, Xinyi Zhang, Lei Yang, Qingfeng Zhuge, Yiyu Shi, Jingtong Hu
Achieving Super-Linear Speedup across Multi-FPGA for Real-Time DNN Inference. ACM Trans. Embed. Comput. Syst. 18 (5s) (2019)
Lei Yang, Weichen Liu, Nan Guan, Nikil D. Dutt
Optimal Application Mapping and Scheduling for Network-on-Chips with Computation in STT-RAM Based Router. IEEE Trans. Computers 68 (8) (2019)
Weiwen Jiang, Lei Yang, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Shouzhen Gu, Yiyu Shi, Jingtong Hu
Hardware/Software Co-Exploration of Neural Architectures. CoRR (2019)
Weiwen Jiang, Qiuwen Lou, Zheyu Yan, Lei Yang, Jingtong Hu, Xiaobo Sharon Hu, Yiyu Shi
Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators. CoRR (2019)
Weiwen Jiang, Edwin Hsing-Mean Sha, Xinyi Zhang, Lei Yang, Qingfeng Zhuge, Yiyu Shi, Jingtong Hu
Achieving Super-Linear Speedup across Multi-FPGA for Real-Time DNN Inference. CoRR (2019)
Weichen Liu, Juan Yi, Mengquan Li, Peng Chen, Lei Yang
Energy-Efficient Application Mapping and Scheduling for Lifetime Guaranteed MPSoCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (1) (2019)
Yanting Huang, Weichen Liu, Mengquan Li, Peng Chen, Lei Yang, Chunhua Xiao, Yaoyao Ye
User Experience-Enhanced and Energy-Efficient Task Scheduling on Heterogeneous Multi-Core Mobile Systems. ICPADS (2018)
Edwin Hsing-Mean Sha, Hailiang Dong, Weiwen Jiang, Qingfeng Zhuge, Xianzhang Chen, Lei Yang
On the Design of Reliable Heterogeneous Systems via Checkpoint Placement and Core Assignment. ACM Great Lakes Symposium on VLSI (2018)
Mengquan Li, Weichen Liu, Lei Yang, Yiyuan Xie, Yaoyao Ye, Nan Guan
Communication optimization for thermal reliable optical network-on-chip: work-in-progress. CODES+ISSS (2018)
Wenyang Liu, Weichen Liu, Mengquan Li, Peng Chen, Lei Yang, Chunhua Xiao, Yaoyao Ye
Fine-Grained Task-Level Parallel and Low Power H.264 Decoding in Multi-Core Systems. ICPADS (2018)
Weichen Liu, Lei Yang, Weiwen Jiang, Liang Feng, Nan Guan, Wei Zhang, Nikil D. Dutt
Thermal-Aware Task Mapping on Dynamically Reconfigurable Network-on-Chip Based Multiprocessor System-on-Chip. IEEE Trans. Computers 67 (12) (2018)
Mengquan Li, Weichen Liu, Lei Yang, Peng Chen, Chao Chen
Chip Temperature Optimization for Dark Silicon Many-Core Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (5) (2018)
Weiwen Jiang, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Lei Yang, Xianzhang Chen, Jingtong Hu
Heterogeneous FPGA-Based Cost-Optimal Design for Timing-Constrained CNNs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (11) (2018)
Lei Yang, Weichen Liu, Nan Guan, Mengquan Li, Peng Chen, Edwin Hsing-Mean Sha
Dark silicon-aware hardware-software collaborated design for heterogeneous many-core systems. ASP-DAC (2017)
Weichen Liu, Lei Yang, Weiwen Jiang, Nan Guan
Communication optimization for thermal reliable many-core systems: work-in-progress. CODES+ISSS (2017)
Weichen Liu, Peng Chen, Lei Yang, Mengquan Li, Nan Guan
Fixed priority scheduling of real-time flows with arbitrary deadlines on smart NoCs: work-in-progress. EMSOFT Companion (2017)
Weiwen Jiang, Edwin Hsing-Mean Sha, Xianzhang Chen, Lei Yang, Lei Zhou, Qingfeng Zhuge
Optimal Functional-Unit Assignment for Heterogeneous Systems Under Timing Constraint. IEEE Trans. Parallel Distributed Syst. 28 (9) (2017)
Lei Yang, Weichen Liu, Peng Chen, Nan Guan, Mengquan Li
Task Mapping on SMART NoC: Contention Matters, Not the Distance. DAC (2017)
Lei Yang, Weichen Liu, Weiwen Jiang, Chao Chen, Mengquan Li, Peng Chen, Edwin Hsing-Mean Sha
Hardware-software collaboration for dark silicon heterogeneous many-core systems. Future Gener. Comput. Syst. 68 (2017)
Lei Yang, Weichen Liu, Weiwen Jiang, Mengquan Li, Peng Chen, Edwin Hsing-Mean Sha
FoToNoC: A Folded Torus-Like Network-on-Chip Based Many-Core Systems-on-Chip in the Dark Silicon Era. IEEE Trans. Parallel Distributed Syst. 28 (7) (2017)
Lei Yang, Weichen Liu, Weiwen Jiang, Mengquan Li, Juan Yi, Edwin Hsing-Mean Sha
FoToNoC: A hierarchical management strategy based on folded lorus-like Network-on-Chip for dark silicon many-core systems. ASP-DAC (2016)
Lei Yang, Weichen Liu, Weiwen Jiang, Mengquan Li, Juan Yi, Edwin Hsing-Mean Sha
Application Mapping and Scheduling for Network-on-Chip-Based Multiprocessor System-on-Chip With Fine-Grain Communication Optimization. IEEE Trans. Very Large Scale Integr. Syst. 24 (10) (2016)
Weiwen Jiang, Qingfeng Zhuge, Xianzhang Chen, Lei Yang, Juan Yi, Edwin Hsing-Mean Sha
Properties of Self-Timed Ring Architectures for Deadlock-Free and Consistent Configuration Reaching Maximum Throughput. J. Signal Process. Syst. 84 (1) (2016)
Edwin Hsing-Mean Sha, Weiwen Jiang, Qingfeng Zhuge, Xianzhang Chen, Lei Yang
Prevent Deadlock and Remove Blocking for Self-Timed Systems. ICA3PP (1) (2015)
Edwin Hsing-Mean Sha, Weiwen Jiang, Qingfeng Zhuge, Lei Yang, Xianzhang Chen
On the Design of High-Performance and Energy-Efficient Probabilistic Self-Timed Systems. HPCC/CSS/ICESS (2015)
Mengquan Li, Juan Yi, Weichen Liu, Wei Zhang, Lei Yang, Edwin Hsing-Mean Sha
An Efficient Technique for Chip Temperature Optimization of Multiprocessor Systems in the Dark Silicon Era. HPCC/CSS/ICESS (2015)
Lei Yang, Weichen Liu, Weiwen Jiang, Wei Zhang, Mengquan Li, Juan Yi, Duo Liu, Edwin Hsing-Mean Sha
Traffic-Aware Application Mapping for Network-on-Chip Based Multiprocessor System-on-Chip. HPCC/CSS/ICESS (2015)
Weiwen Jiang, Qingfeng Zhuge, Juan Yi, Lei Yang, Edwin Hsing-Mean Sha
On self-timed ring for consistent mapping and maximum throughput. RTCSA (2014)
Juan Yi, Weichen Liu, Weiwen Jiang, Mingwen Qin, Lei Yang, Duo Liu, Chunming Xiao, Luelue Du, Edwin Hsing-Mean Sha
An Improved Thermal Model for Static Optimization of Application Mapping and Scheduling in Multiprocessor System-on-Chip. ISVLSI (2014)
Lei Yang, Weichen Liu, Weiwen Jiang, Juan Yi, Duo Liu, Qingfeng Zhuge
Contention-aware task and communication co-scheduling for network-on-chip based Multiprocessor System-on-Chip. RTCSA (2014)