Kimmo Kuusilinna

Publication Activity (10 Years)

Years Active: 1999-2012
Publications (10 Years): 0

Top Topics

Autonomous Mobile

Collaborative Editing

Top Venues

Publications

Eero Aho, Kimmo Kuusilinna, Tomi Aarnio, Janne Pietiainen, Jari Nikara
Towards real-time applications in mobile web browsers. ESTIMedia (2012)
Jarno Vanne, Eero Aho, Kimmo Kuusilinna, Timo D. Hämäläinen
A Configurable Motion Estimation Architecture for Block-Matching Algorithms. IEEE Trans. Circuits Syst. Video Technol. 19 (4) (2009)
Eero Aho, Jari Nikara, Petri A. Tuominen, Kimmo Kuusilinna
A case for multi-channel memories in video recording. DATE (2009)
Eero Aho, Kimmo Kuusilinna, Jari Nikara
Memory access characteristics of H.264 video encoder on embedded processor. SiPS (2009)
Jari Nikara, Eero Aho, Petri A. Tuominen, Kimmo Kuusilinna
Performance analysis of multi-channel memories in mobile devices. SoC (2009)
Jarno Vanne, Eero Aho, Timo D. Hämäläinen, Kimmo Kuusilinna
A Parallel Memory System for Variable Block-Size Motion Estimation Algorithms. IEEE Trans. Circuits Syst. Video Technol. 18 (4) (2008)
Erno Salminen, Tero Kangas, Vesa Lahtinen, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen
Benchmarking mesh and hierarchical bus networks in system-on-chip context. J. Syst. Archit. 53 (8) (2007)
Eero Aho, Jarno Vanne, Timo D. Hämäläinen, Kimmo Kuusilinna
Configurable implementation of parallel memory based real-time video downscaler. Microprocess. Microsystems 31 (5) (2007)
Jarno Vanne, Eero Aho, Timo Hämäläinen, Kimmo Kuusilinna
A High-Performance Sum of Absolute Difference Implementation for Motion Estimation. IEEE Trans. Circuits Syst. Video Technol. 16 (7) (2006)
Tero Kangas, Petri Kukkala, Heikki Orsila, Erno Salminen, Marko Hännikäinen, Timo D. Hämäläinen, Jouni Riihimäki, Kimmo Kuusilinna
UML-based multiprocessor SoC design framework. ACM Trans. Embed. Comput. Syst. 5 (2) (2006)
Tero Kangas, Timo D. Hämäläinen, Kimmo Kuusilinna
Scalable Architecture for SoC Video Encoders. J. VLSI Signal Process. 44 (1-2) (2006)
Erno Salminen, Tero Kangas, Timo D. Hämäläinen, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna
HIBI Communication Network for System-on-Chip. J. VLSI Signal Process. 43 (2-3) (2006)
Eero Aho, Jarno Vanne, Kimmo Kuusilinna, Timo D. Hämäläinen
Comments on "Winscale: an image-scaling algorithm using an area pixel Model". IEEE Trans. Circuits Syst. Video Technol. 15 (3) (2005)
Eero Aho, Jarno Vanne, Kimmo Kuusilinna, Timo Hämäläinen
Block-level parallel processing for scaling evenly divisible frames. ISCAS (2) (2005)
Eero Aho, Jarno Vanne, Timo D. Hämäläinen, Kimmo Kuusilinna
Block-level parallel processing for scaling evenly divisible images. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2005)
Erno Salminen, Tero Kangas, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna, Timo D. Hämäläinen
Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context. SAMOS (2005)
Jouni Riihimäki, Petri Kukkala, Erno Salminen, Marko Hännikäinen, Kimmo Kuusilinna, Timo D. Hämäläinen
Practical distributed simulation of a network of wireless terminals. SoC (2004)
Erno Salminen, Vesa Lahtinen, Tero Kangas, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen
HIBI v.2 Communication Network for System-on-Chip. SAMOS (2004)
Kimmo Kuusilinna, Chen Chang, Hans-Martin Blüthgen, Danijela Cabric, Brian C. Richards, Robert W. Brodersen
Describing MIMO designs for rapid prototyping in the BEE environment. EUSIPCO (2004)
Tero Kangas, Jouni Riihimäki, Erno Salminen, Vesa Lahtinen, Heikki Orsila, Kimmo Kuusilinna, Timo D. Hämäläinen
A Communication-Centric Design Flow for HIBI-Based SoCs. SAMOS (2004)
Eero Aho, Jarno Vanne, Kimmo Kuusilinna, Timo D. Hämäläinen
Address Computation in Configurable Parallel Memory Architecture. IEICE Trans. Inf. Syst. (7) (2004)
Erno Salminen, Kimmo Kuusilinna, Timo D. Hämäläinen
Comparison of hardware IP components for system-on-chip. SoC (2004)
Jouni Riihimäki, Väinö Helminen, Kimmo Kuusilinna, Timo D. Hämäläinen
Distributing SoC Simulations over a Network of Computers. DSD (2003)
Tero Kangas, Jouni Riihimäki, Erno Salminen, Kimmo Kuusilinna, Timo D. Hämäläinen
Using a communication generator in SoC architecture exploration. SoC (2003)
Vesa Lahtinen, Erno Salminen, Kimmo Kuusilinna, Timo D. Hämäläinen
Comparison of synthesized bus and crossbar interconnection architectures. ISCAS (5) (2003)
Kimmo Kuusilinna, Chen Chang, M. Josephine Ammer, Brian C. Richards, Robert W. Brodersen
Designing BEE: A Hardware Emulation Engine for Signal Processing in Low-Power Wireless Applications. EURASIP J. Adv. Signal Process. 2003 (6) (2003)
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, Allen Chen, Nathan Chan, Robert W. Brodersen, Borivoje Nikolic
Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment. IEEE International Workshop on Rapid System Prototyping (2003)
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, Robert W. Brodersen
Implementation of BEE: a real-time large-scale hardware emulation engine. FPGA (2003)
Jarno Vanne, Eero Aho, Kimmo Kuusilinna, Timo D. Hämäläinen
Enhanced Configurable Parallel Memory Architecture. DSD (2002)
Kimmo Kuusilinna, Jarno K. Tanskanen, Timo Hämäläinen, Jarkko Niittylahti
Configurable parallel memory architecture for multimedia computers. J. Syst. Archit. 47 (14-15) (2002)
Vesa Lahtinen, Kimmo Kuusilinna, Timo Hämäläinen
Optimizing finite state machines for system-on-chip communication. ISCAS (1) (2002)
Tero Kangas, Kimmo Kuusilinna, Timo Hämäläinen
TDMA-based communication scheduling in system-on-chip video encoder. ISCAS (1) (2002)
Jouni Riihimäki, Erno Salminen, Kimmo Kuusilinna, Timo Hämäläinen
Parameter optimization tool for enhancing on-chip network performance. ISCAS (4) (2002)
Vesa Lahtinen, Kimmo Kuusilinna, Tero Kangas, Timo Hämäläinen
Interconnection scheme for continuous-media systems-on-a-chip. Microprocess. Microsystems 26 (3) (2002)
Erno Salminen, Timo D. Hämäläinen, Tero Kangas, Kimmo Kuusilinna, Jukka Saarinen
Interfacing multiple processors in a system-on-chip video encoder. ISCAS (4) (2001)
Vesa Lahtinen, Kimmo Kuusilinna, Timo Hämäläinen, Tero Kangas, Jukka Saarinen
Reuseable interface in multimedia hardware environment. EUSIPCO (2000)
Kimmo Kuusilinna, Timo Hämäläinen, Jukka Saarinen
Field programmable gate array-based PCI interface for a coprocessor system. Microprocess. Microsystems 22 (7) (1999)
Kimmo Kuusilinna, Timo Hämäläinen, Jukka Saarinen
Practical VHDL optimization for timing critical FPGA applications. Microprocess. Microsystems 23 (8-9) (1999)
Kimmo Kuusilinna, Pasi Liimatainen, Timo Hämäläinen, Jukka Saarinen
Reconfiguration Mechanism for an IP Block Based Interconnection. EUROMICRO (1999)