Jarkko Niittylahti

Publication Activity (10 Years)

Years Active: 1993-2011
Publications (10 Years): 0

Publications

Juhana Helovuo, Jarkko Niittylahti, Heikki Berg
Corento - SIMD Parallelism from Portable High-Level Code. PARCO (2011)
Jarno K. Tanskanen, Reiner Creutzburg, Jarkko Niittylahti
On Design of Parallel Memory Access Schemes for Video Coding. J. VLSI Signal Process. 40 (2) (2005)
Jarno K. Tanskanen, Jarkko Niittylahti
Scalable Parallel Memory Architectures for Video Coding. J. VLSI Signal Process. 38 (2) (2004)
Juha Alakarhu, Jarkko Niittylahti
DRAM performance as a function of its structure and memory stream locality. Microprocess. Microsystems 28 (2) (2004)
Jarno K. Tanskanen, Tero Sihvo, Jarkko Niittylahti
Byte and modulo addressable parallel memory architecture for video coding. IEEE Trans. Circuits Syst. Video Technol. 14 (11) (2004)
Juha Alakarhu, Jarkko Niittylahti
Scalar Metric for Temporal Locality and Estimation of Cache Performance. DATE (2004)
Hakan Öktem, Karen O. Egiazarian, Jarkko Niittylahti, Juha Lemmetti
An Approach to Adaptive Enhancement of Diagnostic X-Ray Images. EURASIP J. Adv. Signal Process. 2003 (5) (2003)
K. I. Palomaki, Jarkko Niittylahti
A low-power, memoryless direct digital frequency synthesizer architecture. ISCAS (2) (2003)
Florean Curticapean, K. I. Palomaki, Jarkko Niittylahti
Quadrature direct digital frequency synthesizer using an angle rotation algorithm. ISCAS (2) (2003)
Sakari Junnila, Jarkko Niittylahti
Wireless technologies for data acquisition systems. ISICT (2003)
Juha Alakarhu, Jarkko Niittylahti
TraceAnalyzer - an open framework for memory stream analysis. ICECS (2003)
Tero Rissa, Riku Uusikartano, Jarkko Niittylahti
Adaptive FIR filter architectures for run-time reconfigurable FPGAs. FPT (2002)
Tero Rissa, Milan Vasilko, Jarkko Niittylahti
System-Level Modelling and Implementation Technique for Run-Time Reconfigurable Systems. FCCM (2002)
Jarkko Niittylahti, Juha Lemmetti, Juhana Helovuo
High-performance implementation of wavelet algorithms on a standard PC. Microprocess. Microsystems 26 (4) (2002)
Juha Alakarhu, Jarkko Niittylahti
A comparison of precharge policies with modern DRAM architectures. ICECS (2002)
Kimmo Kuusilinna, Jarno K. Tanskanen, Timo Hämäläinen, Jarkko Niittylahti
Configurable parallel memory architecture for multimedia computers. J. Syst. Archit. 47 (14-15) (2002)
Juha Alakarhu, Jarkko Niittylahti
DRAM simulator for design and analysis of digital systems. Microprocess. Microsystems 26 (4) (2002)
Sakari Junnila, Jarkko Ruoho, Jarkko Niittylahti
Medical isolation of universal serial bus data signals. ICECS (2002)
Florean Curticapean, Jarkko Niittylahti
Direct digital frequency synthesizers of high spectral purity based on quadratic approximation. ICECS (2002)
Florean Curticapean, Jarkko Niittylahti
A hardware efficient direct digital frequency synthesizer. ICECS (2001)
Julia Latvala, Jan Syrjarinne, Hannu Ikonen, Jarkko Niittylahti
Evaluation of RSSI-based human tracking. EUSIPCO (2000)
Jarno K. Tanskanen, Tero Sihvo, Jarkko Niittylahti, Jarmo Takala, Reiner Creutzburg
Parallel, memory access schemes for H.263 encoder. ISCAS (2000)
Tero Rissa, Jarkko Niittylahti
A Hybrid Prototyping Platform for Dynamically Reconfigurable Designs. FPL (2000)
Florean Curticapean, Jarkko Niittylahti
Complex digital oscillator with absolute periodicity. EUSIPCO (2000)
Juha Alakarhu, Jarkko Niittylahti, Tero Sihvo, Jarno K. Tanskanen
Verifying external data memory interface for H.263 video DSP with memory simulator. EUSIPCO (2000)
Jarno K. Tanskanen, Jarkko Niittylahti
Parallel Memories in Video Encoding. Data Compression Conference (1999)
K. Palomaki, Jarkko Niittylahti, Markku Renfors
Numerical sine and cosine synthesis using a complex multiplier. ISCAS (4) (1999)
Riku Uusikartano, Jarkko Niittylahti, Markku Renfors
Area-optimized FPGA implementation of a digital FM modulator. ISCAS (4) (1999)
Tero Rissa, Tommi Mäkeläinen, Jarkko Niittylahti, Jouni Siirtola
Fast Prototyping Using System Emulators. FPL (1998)
Jarkko Niittylahti
Hardware Prototypes of a Boolean Neural Network and the Simulated Annealing Optimization Method. Int. J. Neural Syst. 7 (1) (1996)
Jarkko Niittylahti, Harri Raittinen, Kimmo Kaski
Dynamically Configurable Combinatory Logic Array as Boolean Neural Network. ICTAI (1993)