Address Computation in Configurable Parallel Memory Architecture.
Eero AhoJarno VanneKimmo KuusilinnaTimo D. HämäläinenPublished in: IEICE Trans. Inf. Syst. (2004)
Keyphrases
- processing elements
- parallel computers
- pipelined architecture
- level parallelism
- parallel computation
- inter processor communication
- shared memory
- parallel architecture
- associative memory
- multithreading
- management system
- distributed processing
- parallel algorithm
- memory usage
- memory management
- parallel processing
- parallel hardware
- parallel computing
- multi processor
- database
- compute intensive
- multiprocessor systems
- load balancing
- distributed systems
- hardware architecture
- master slave
- memory footprint
- random access
- massively parallel
- heterogeneous systems
- parallel processors
- memory access
- memory hierarchy
- computational power
- parallel implementation
- real time
- main memory