Kazuo Nakajima

Publication Activity (10 Years)

Years Active: 1980-2006
Publications (10 Years): 0

Publications

Mitsuru Tomono, Masaki Nakanishi, Shigeru Yamashita, Kazuo Nakajima, Katsumasa Watanabe
A New Approach to Online FPGA Placement. CISS (2006)
Mitsuru Tomono, Masaki Nakanishi, Shigeru Yamashita, Kazuo Nakajima, Katsumasa Watanabe
An Efficient and Effective Algorithm for Online Task Placement with I/O Communications in Partially Reconfigurable FPGAs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2006)
Kazuo Nakajima, Brian Schott, Tokinori Kozawa, Jose L. Muñoz, Wolfgang Rosenstiel, Sakae Takahashi, Chen-Wen Wu
Roles of funding agencies in technology-driven economic development. ASP-DAC (2003)
Gary Spivey, Shuvra S. Bhattacharyya, Kazuo Nakajima
Logic Foundry: Rapid Prototyping for FPGA-Based DSP Systems. EURASIP J. Adv. Signal Process. 2003 (6) (2003)
Gary Spivey, Shuvra S. Bhattacharyya, Kazuo Nakajima
Logic foundry: rapid prototyping of FPGA-based DSP systems. ASP-DAC (2003)
Gary Spivey, Shuvra S. Bhattacharyya, Kazuo Nakajima
A Component Architecture for FPGA-Based, DSP System Design. ASAP (2002)
Kazuo Aoyama, Hiroshi Sawada, Akira Nagoya, Kazuo Nakajima
A Threshold Logic-Based Reconfigurable Logic Element with a New Programming Technology. FPL (2000)
Young-Jun Cha, Chong S. Rim, Kazuo Nakajima
SEGRA: a very fast general area router for multichip modules. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18 (5) (1999)
Kazuyoshi Tsutsumi, Kazuo Nakajima
Maximum/minimum detection by a module-based neural network with redundant architecture. IJCNN (1999)
Jagannathan Narasimhan, Kazuo Nakajima, Chong S. Rim
A Graph Theoretical Approach for the Yield Enhancement of Reconfigurable VLSI/WSI Arrays. Discret. Appl. Math. 90 (1-3) (1999)
Young-Jun Cha, Chong S. Rim, Kazuo Nakajima
A simple and effective greedy multilayer router for MCMs. ISPD (1997)
Kazuhiro Takahashi, Kazuo Nakajima, Masayuki Terai, Koji Sato
Min-cut placement with global objective functions for large scale sea-of-gates arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (4) (1995)
Masayuki Terai, Kazuo Nakajima, Kazuhiro Takahashi, Koji Sato
A new approach to over-the-cell channel routing with three layers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13 (2) (1994)
Jagannathan Narasimham, Kazuo Nakajima, Chong S. Rim, Anton T. Dahbura
Yield enhancement of programmable ASIC arrays by reconfiguration of circuit placements. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13 (8) (1994)
Kazuhiro Takahashi, Kazuo Nakajima, Masayuki Terai, Koji Sato
Adaptive cut line selection in min-cut placement for large scale sea-of-gates arrays. ICCAD (1994)
Jagannathan Narasimhan, Kazuo Nakajima
A Reconfiguration-Based Yield Enhancement System. ICCD (1993)
Toshinobu Kashiwabara, Sumio Masuda, Kazuo Nakajima, Toshio Fujisawa
Generation of Maximum Independent Sets of a Bipartite Graph and Maximum Cliques of a Circular-Arc Graph. J. Algorithms 13 (1) (1992)
Ruey-Der Lou, Majid Sarrafzadeh, Chong S. Rim, Kazuo Nakajima, Sumio Masuda
General Circular Permutation Layout. Math. Syst. Theory 25 (4) (1992)
Hirokazu Kotani, Akira Kawamura, Asako Takahashi, Masako Nakatsuji, Nobutsugu Hiraoka, Kazuo Nakajima, Mituru Takanami
Site-specific dissection of E. coli chromosome by lambda terminase. Nucleic Acids Res. 20 (13) (1992)
Masayuki Terai, Kazuhiro Takahashi, Kazuo Nakajima, Koji Sato
A New Model for Over-The-Cell Channel Routing with Three Layers. ICCAD (1991)
Toshinobu Kashiwabara, Sumio Masuda, Kazuo Nakajima, Toshio Fujisawa
Polynomial time algorithms on circular-arc overlap graphs. Networks 21 (2) (1991)
Po-Yang F. Lin, Kazuo Nakajima
A linear time algorithm for optimal CMOS functional cell layouts. ICCD (1990)
Sumio Masuda, Kazuo Nakajima, Toshinobu Kashiwabara, Toshio Fujisawa
Efficient algorithms for finding maximum cliques of an overlap graph. Networks 20 (2) (1990)
Sumio Masuda, Kazuo Nakajima, Toshinobu Kashiwabara, Toshio Fujisawa
Crossing Minimization in Linear Embeddings of Graphs. IEEE Trans. Computers 39 (1) (1990)
Hyeong-Ah Choi, Kazuo Nakajima, Chong S. Rim
Graph Bipartization and via Minimization. SIAM J. Discret. Math. 2 (1) (1989)
Chong S. Rim, Toshinobu Kashiwabara, Kazuo Nakajima
Exact algorithms for multilayer topological via minimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8 (11) (1989)
Nicholas J. Naclerio, Sumio Masuda, Kazuo Nakajima
The Via Minimization Problem is NP-Complete. IEEE Trans. Computers 38 (11) (1989)
Sumio Masuda, Kazuo Nakajima
An Optimal Algorithm for Finding a Maximum Independent Set of a Circular-Arc Graph. SIAM J. Comput. 17 (1) (1988)
Nicholas J. Naclerio, Sumio Masuda, Kazuo Nakajima
Via Minimization for Gridless Layouts. DAC (1987)
Jagannathan Narasimhan, Kazuo Nakajima
An Algorithm for Determining the Fault Diagnosability of a System. IEEE Trans. Computers 35 (11) (1986)
S. Louis Hakimi, Kazuo Nakajima
On Adaptive System Diagnosis. IEEE Trans. Computers 33 (3) (1984)
Kazuo Nakajima, S. Louis Hakimi
Complexity Results for Scheduling Tasks with Discrete Starting Times. J. Algorithms 3 (4) (1982)
Hideo Yabe, Yoshisuke Shimizu, Chikara Iwata, Kazuo Nakajima
Traffic Assistance Service System for ESS. IEEE Trans. Commun. 28 (1) (1980)