Yield enhancement of programmable ASIC arrays by reconfiguration of circuit placements.
Jagannathan NarasimhamKazuo NakajimaChong S. RimAnton T. DahburaPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1994)
Keyphrases
- circuit design
- single chip
- high speed
- low cost
- image enhancement
- low power
- integrated circuit
- image processing
- design methodology
- digital circuits
- application specific
- manufacturing systems
- general purpose
- processor array
- analog circuits
- logic circuits
- analog vlsi
- neural network
- hardware implementation
- hardware architecture
- electronic circuits
- logic synthesis
- signal processor