Karthik Duraisami

Publication Activity (10 Years)

Years Active: 2006-2010
Publications (10 Years): 0

Publications

Ashutosh Chakraborty, Karthik Duraisami, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino
Thermal-Aware Clock Tree Design to Increase Timing Reliability of Embedded SoCs. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2010)
Karthik Duraisami, Enrico Macii, Massimo Poncino
Using soft-edge flip-flops to compensate NBTI-induced delay degradation. ACM Great Lakes Symposium on VLSI (2009)
Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino
Implementation of a thermal management unit for canceling temperature-dependent clock skew variations. Integr. 41 (1) (2008)
Andrea Calimera, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, R. Iris Bahar, Alberto Macii, Enrico Macii, Massimo Poncino
Thermal-Aware Design Techniques for Nanometer CMOS Circuits. J. Low Power Electron. 4 (3) (2008)
Karthik Duraisami, Enrico Macii, Massimo Poncino
Energy efficiency bounds of pulse-encoded buses. ACM Great Lakes Symposium on VLSI (2008)
Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
Dynamic Thermal Clock Skew Compensation Using Tunable Delay Buffers. IEEE Trans. Very Large Scale Integr. Syst. 16 (6) (2008)
Karthik Duraisami, Prassanna Sithambaram, Ashoka Visweswara Sathanur, Alberto Macii, Enrico Macii, Massimo Poncino
Design Exploration of a Thermal Management Unit for Dynamic Control of Temperature-Induced Clock Skew. ISCAS (2007)
Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino
Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits. ISCAS (2006)
Ashutosh Chakraborty, Prassanna Sithambaram, Karthik Duraisami, Alberto Macii, Enrico Macii, Massimo Poncino
Thermal resilient bounded-skew clock tree optimization methodology. DATE (2006)
Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino
Dynamic Management of Thermally-Induced Clock Skew: An Implementation Perspective. PATMOS (2006)
Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
Dynamic thermal clock skew compensation using tunable delay buffers. ISLPED (2006)