K. W. Su

Publication Activity (10 Years)

Years Active: 1994-1995
Publications (10 Years): 0

Publications

James B. Kuo, K. W. Su, J. H. Lou
A BiCMOS dynamic multiplier using Wallace tree reduction architecture and 1.5-V full-swing BiCMOS dynamic logic circuit. IEEE J. Solid State Circuits 30 (8) (1995)
James B. Kuo, K. W. Su, J. H. Lou, S. S. Chen, C. S. Chiang
A 1.5 V full-swing BiCMOS dynamic logic gate circuit suitable for VLSI using low-voltage BiCMOS technology. IEEE J. Solid State Circuits 30 (1) (1995)
James B. Kuo, K. W. Su, J. H. Lou
A BiCMOS Dynamic Multiplier Using Wallace Tree Reduction Architecture and 1.5V Full-Swing BiCMOS Dynamic Logic Circuit. ISCAS (1994)