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J. H. Lou
Publication Activity (10 Years)
Years Active: 1994-1998
Publications (10 Years): 0
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Publications
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J. H. Lou
,
James B. Kuo
1.5 V CMOS bootstrapped dynamic logic circuit techniques (BDLCT) suitable for low-voltage deep-submicron CMOS VLSI for implementing 482 MHz digital quadrature modulator and adder.
ICECS
(1998)
J. H. Lou
,
James B. Kuo
A 1.5-V full-swing bootstrapped CMOS large capacitive-load driver circuit suitable for low-voltage CMOS VLSI.
IEEE J. Solid State Circuits
32 (1) (1997)
James B. Kuo
,
K. W. Su
,
J. H. Lou
A BiCMOS dynamic multiplier using Wallace tree reduction architecture and 1.5-V full-swing BiCMOS dynamic logic circuit.
IEEE J. Solid State Circuits
30 (8) (1995)
James B. Kuo
,
K. W. Su
,
J. H. Lou
,
S. S. Chen
,
C. S. Chiang
A 1.5 V full-swing BiCMOS dynamic logic gate circuit suitable for VLSI using low-voltage BiCMOS technology.
IEEE J. Solid State Circuits
30 (1) (1995)
James B. Kuo
,
K. W. Su
,
J. H. Lou
A BiCMOS Dynamic Multiplier Using Wallace Tree Reduction Architecture and 1.5V Full-Swing BiCMOS Dynamic Logic Circuit.
ISCAS
(1994)