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A BiCMOS dynamic multiplier using Wallace tree reduction architecture and 1.5-V full-swing BiCMOS dynamic logic circuit.
James B. Kuo
K. W. Su
J. H. Lou
Published in:
IEEE J. Solid State Circuits (1995)
Keyphrases
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dynamic logic
mixed signal
hardware implementation
tree structure
analog vlsi
dynamic environments
index structure
modal logic
virtual organization
high speed
power system
real time
software engineering
circuit design
reasoning about actions
management system
data structure
knowledge base