Julien Schmaltz

Publication Activity (10 Years)

Years Active: 2003-2020
Publications (10 Years): 4

Top Topics

Deadlock Detection

Sensor Networks

Description Languages

Formal Specification

Top Venues

Publications

Alexander Fedotov, Jeroen J. A. Keiren, Julien Schmaltz
Effective System Level Liveness Verification. FMCAD (2020)
Alexander Fedotov, Julien Schmaltz
Automatic generation of hardware checkers from formal micro-architectural specifications. DATE (2018)
Perry van Wesel, Julien Schmaltz
Formal micro-architectural analysis of on-chip ring networks. DAC (2018)
Ruud Koolen, Julien Schmaltz
Modeling Information Routing with Noninterference. MILS@HiPEAC (2016)
Ruud Koolen, Julien Schmaltz
Formal Methods for MILS: Formalisations of the GWV Firewall. MILS@HiPEAC (2015)
Sanne Wouda, Sebastiaan J. C. Joosten, Julien Schmaltz
Process algebra semantics & reachability analysis for micro-architectural models of communication fabrics. MEMOCODE (2015)
Sebastiaan J. C. Joosten, Julien Schmaltz
Automatic extraction of micro-architectural models of communication fabrics from register transfer level designs. DATE (2015)
Freek Verbeek, Oto Havle, Julien Schmaltz, Sergey Tverdyshev, Holger Blasum, Bruno Langenstein, Werner Stephan, Burkhart Wolff, Yakoub Nemouchi
Formal API Specification of the PikeOS Separation Kernel. NFM (2015)
Freek Verbeek, Sergey Tverdyshev, Oto Havle, Holger Blasum, Bruno Langenstein, Werner Stephan, Yakoub Nemouchi, Abderrahmane Feliachi, Burkhart Wolff, Julien Schmaltz
Formal Specification of a Generic Separation Kernel. Arch. Formal Proofs 2014 (2014)
Freek Verbeek, Julien Schmaltz
A Decision Procedure for Deadlock-Free Routing in Wormhole Networks. IEEE Trans. Parallel Distributed Syst. 25 (8) (2014)
Sebastiaan J. C. Joosten, Julien Schmaltz
Scalable liveness verification for communication fabrics. DATE (2014)
Bernard van Gastel, Freek Verbeek, Julien Schmaltz
Inference of channel types in micro-architectural models of on-chip communication networks. VLSI-SoC (2014)
Adrian Garcia Ramirez, Julien Schmaltz, Freek Verbeek, Bruno Langenstein, Holger Blasum
On Two Models of Noninterference: Rushby and Greve, Wilding, and Vanfleet. SAFECOMP (2014)
Freek Verbeek, Sebastiaan J. C. Joosten, Julien Schmaltz
Formal Deadlock Verification for Click Circuits. ASYNC (2013)
Freek Verbeek, Julien Schmaltz
Verification of Building Blocks for Asynchronous Circuits ACL2 (2013)
Sebastiaan J. C. Joosten, Bernard van Gastel, Julien Schmaltz
A Macro for Reusing Abstract Functions and Theorems ACL2 (2013)
Bernard van Gastel, Julien Schmaltz
A formalisation of XMAS ACL2 (2013)
Sebastiaan J. C. Joosten, Julien Schmaltz
Generation of inductive invariants from register transfer level designs of communication fabrics. MEMOCODE (2013)
Freek Verbeek, Julien Schmaltz
Automatic generation of deadlock detection algorithms for a family of microarchitecture description languages of communication fabrics. HLDVT (2012)
Abdulaziz Alhussien, Nader Bagherzadeh, Freek Verbeek, Bernard van Gastel, Julien Schmaltz
A formally verified deadlock-free routing function in a fault-tolerant NoC architecture. SBCCI (2012)
Freek Verbeek, Julien Schmaltz
Easy Formal Specification and Validation of Unbounded Networks-on-Chips Architectures. ACM Trans. Design Autom. Electr. Syst. 17 (1) (2012)
Freek Verbeek, Julien Schmaltz
Towards the formal verification of cache coherency at the architectural level. ACM Trans. Design Autom. Electr. Syst. 17 (3) (2012)
Freek Verbeek, Julien Schmaltz
Proof Pearl: A Formal Proof of Dally and Seitz' Necessary and Sufficient Condition for Deadlock-Free Routing in Interconnection Networks. J. Autom. Reason. 48 (4) (2012)
Faranak Heidarian, Julien Schmaltz, Frits W. Vaandrager
Analysis of a clock synchronization protocol for wireless sensor networks. Theor. Comput. Sci. 413 (1) (2012)
Freek Verbeek, Julien Schmaltz
Formal verification of a deadlock detection algorithm ACL2 (2011)
Freek Verbeek, Julien Schmaltz
A Fast and Verified Algorithm for Proving Store-and-Forward Networks Deadlock-Free. PDP (2011)
Freek Verbeek, Julien Schmaltz
Hunting deadlocks efficiently in microarchitectural models of communication fabrics. FMCAD (2011)
Freek Verbeek, Julien Schmaltz
Automatic verification for deadlock in networks-on-chips with adaptive routing and wormhole switching. NOCS (2011)
Carsten Rütz, Julien Schmaltz
An Experience Report on an Industrial Case-Study about Timed Model-Based Testing with UPPAAL-TRON. ICST Workshops (2011)
Julien Schmaltz
Formal verification of a time-triggered hardware interface CoRR (2011)
Freek Verbeek, Julien Schmaltz
A Comment on "A Necessary and Sufficient Condition for Deadlock-Free Adaptive Routing in Wormhole Networks". IEEE Trans. Parallel Distributed Syst. 22 (10) (2011)
Freek Verbeek, Julien Schmaltz
On Necessary and Sufficient Conditions for Deadlock-Free Routing in Wormhole Networks. IEEE Trans. Parallel Distributed Syst. 22 (12) (2011)
Fides Aarts, Julien Schmaltz, Frits W. Vaandrager
Inference and Abstraction of the Biometric Passport. ISoLA (1) (2010)
Jasper Berendsen, David N. Jansen, Julien Schmaltz, Frits W. Vaandrager
The axiomatization of override and update. J. Appl. Log. 8 (1) (2010)
Freek Verbeek, Julien Schmaltz
Formal specification of networks-on-chips: deadlock and evacuation. DATE (2010)
Freek Verbeek, Julien Schmaltz
A Formal Proof of a Necessary and Sufficient Condition for Deadlock-Free Adaptive Networks. ITP (2010)
Sabrina von Styp, Henrik C. Bohnenkamp, Julien Schmaltz
A Conformance Testing Relation for Symbolic Timed Automata. FORMATS (2010)
Dominique Borrione, Amr Helmy, Laurence Pierre, Julien Schmaltz
A Formal Approach to the Verification of Networks on Chip. EURASIP J. Embed. Syst. 2009 (2009)
Tom van den Broek, Julien Schmaltz
Towards a formally verified network-on-chip. FMCAD (2009)
Wojciech Mostowski, Erik Poll, Julien Schmaltz, Jan Tretmans, Ronny Wichers Schreur
Model-Based Testing of Electronic Passports. FMICS (2009)
Faranak Heidarian, Julien Schmaltz, Frits W. Vaandrager
Analysis of a Clock Synchronization Protocol for Wireless Sensor Networks. FM (2009)
Julien Schmaltz, Dominique Borrione
A functional formalization of on chip communications. Formal Aspects Comput. 20 (3) (2008)
Dominique Borrione, Amr Helmy, Laurence Pierre, Julien Schmaltz
Executable formal specification and validation of NoC communication infrastructures. SBCCI (2008)
Julien Schmaltz, Jan Tretmans
On Conformance Testing for Timed Systems. FORMATS (2008)
Dominique Borrione, Amr Helmy, Laurence V. Pierre, Julien Schmaltz
A Generic Model for Formally Verifying NoC Communication Architectures: A Case Study. NOCS (2007)
Julien Schmaltz
A Formal Model of Clock Domain Crossing and Automated Verification of Time-Triggered Hardware. FMCAD (2007)
Julien Schmaltz, Dominique Borrione
Formalizing On Chip Communications in a Functional Style. Trustworthy Software (2006)
Julien Schmaltz
A Formal Model of Lower System Layers. FMCAD (2006)
Julien Schmaltz, Dominique Borrione
Towards a formal theory of on chip communications in the ACL2 logic. ACL2 (2006)
Julien Schmaltz, Dominique Borrione
A Generic Network on Chip Model. TPHOLs (2005)
Ghiath Al Sammane, Julien Schmaltz, Diana Toma, Pierre Ostier, Dominique Borrione
TheoSim: combining symbolic simulation and theorem proving for hardware verification. SBCCI (2004)
Julien Schmaltz, Dominique Borrione
A Functional Approach to the Formal Specification of Networks on Chip. FMCAD (2004)
Ghiath Al Sammane, Diana Toma, Julien Schmaltz, Pierre Ostier, Dominique Borrione
Constrained Symbolic Simulation with Mathematica and ACL2. CHARME (2003)