John A. Chandy

Publication Activity (10 Years)

Years Active: 1993-2023
Publications (10 Years): 39

Top Topics

Reverse Engineer

Random Number Generators

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Paul A. Wortman, John A. Chandy
Translation of AADL model to security attack tree (TAMSAT) to SMART evaluation of monetary security risk. Inf. Secur. J. A Glob. Perspect. 32 (4) (2023)
Nicholas Chan, John A. Chandy
Extracting Vulnerabilities from GitHub Commits. SANER (2022)
Paul A. Wortman, John A. Chandy
A framework for evaluating security risk in system design. Discov. Internet Things 2 (1) (2022)
Jason Dejesus, John A. Chandy
Cache Locking and Encryption to Prevent Memory Snooping in Embedded Systems. DSC (2022)
Paul A. Wortman, John A. Chandy
A Trace-Based Study of SMB Network File System Workloads in an Academic Enterprise. SPECTS (2020)
Paul A. Wortman, Fatemeh Tehranipoor, John A. Chandy
Exploring the Coverage of Existing Hardware Vulnerabilities in Community Standards. SVCC (2020)
Paul A. Wortman, John A. Chandy
SMART: security model adversarial risk-based tool for systems security design evaluation. J. Cybersecur. 6 (1) (2020)
Wei Yan, Fatemeh Tehranipoor, Xuan Zhang, John A. Chandy
FLASH: FPGA Locality-Aware Sensitive Hash for Nearest Neighbor Search and Clustering Application. FPL (2020)
Md Shahed Enamul Quadir, John A. Chandy
Embedded Systems Authentication and Encryption Using Strong PUF Modeling. ICCE (2020)
Wei Yan, Huifeng Zhu, Zhiyuan Yu, Fatemeh Tehranipoor, John A. Chandy, Ning Zhang, Xuan Zhang
RNG: Leveraging Bad-page Initialized Table with Bit-error Insertion for True Random Number Generation in Commodity Flash Memory. HOST (2020)
Md Shahed Enamul Quadir, John A. Chandy
Key Generation for Hardware Obfuscation Using Strong PUFs. Cryptogr. 3 (3) (2019)
Supriya Karmakar, John A. Chandy, Faquir C. Jain
Eight-bit ADC using non-volatile flash memory. IET Circuits Devices Syst. 13 (1) (2019)
Michael P. Kapralos, John A. Chandy
HOTMeTaL: Hardware Optimization Tool for Memory Table and Logic Conversion. FPGA (2019)
Paul A. Wortman, Fatemeh Tehranipoor, John A. Chandy
An Adversarial Risk-based Approach for Network Architecture Security Modeling and Design. Cyber Security (2018)
Nikolaos Athanasios Anagnostopoulos, Stefan Katzenbeisser, John A. Chandy, Fatemeh Tehranipoor
An Overview of DRAM-Based Security Primitives. Cryptogr. 2 (2) (2018)
Fatemeh Tehranipoor, Paul A. Wortman, Nima Karimian, Wei Yan, John A. Chandy
DVFT: A Lightweight Solution for Power-Supply Noise-Based TRNG Using Dynamic Voltage Feedback Tuning System. IEEE Trans. Very Large Scale Integr. Syst. 26 (6) (2018)
Chujiao Ma, John A. Chandy
Error Tolerant ASCA on FPGA. ICCCS (3) (2018)
Wei Yan, John A. Chandy
Phase Calibrated Ring Oscillator PUF Design and Application. Comput. 7 (3) (2018)
Fatemeh Tehranipoor, Nima Karimian, Paul A. Wortman, John A. Chandy
Low-cost authentication paradigm for consumer electronics within the internet of wearable fitness tracking applications. ICCE (2018)
Paul A. Wortman, Wei Yan, John A. Chandy, Fatemeh Tehranipoor
P2M-based security model: security enhancement using combined PUF and PRNG models for authenticating consumer electronic devices. IET Comput. Digit. Tech. 12 (6) (2018)
Wei Yan, Daniel Fontaine, John A. Chandy, Laurent Michel
A design flow with integrated verification of requirements and faults in safety-critical systems. SoSE (2017)
Chujiao Ma, John A. Chandy, Laurent Michel, Fanghui Liu, Waldemar Cruz
Influence of Error on Hamming Weights for ASCA. Inscrypt (2017)
Wei Yan, Fatemeh Tehranipoor, John A. Chandy
PUF-Based Fuzzy Authentication Without Error Correcting Codes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (9) (2017)
Fatemeh Tehranipoor, Nima Karimian, Wei Yan, John A. Chandy
Investigation of DRAM PUFs reliability under device accelerated aging effects. ISCAS (2017)
Wei Yan, Chenglu Jin, Fatemeh Tehranipoor, John A. Chandy
Phase calibrated ring oscillator PUF design and implementation on FPGAs. FPL (2017)
Paul A. Wortman, Fatemeh Tehranipoor, Nima Karimian, John A. Chandy
Proposing a modeling framework for minimizing security vulnerabilities in IoT systems in the healthcare domain. BHI (2017)
Charles Eckert, Fatemeh Tehranipoor, John A. Chandy
DRNG: DRAM-based random number generation using its startup value behavior. MWSCAS (2017)
Chujiao Ma, John A. Chandy, Zhijie Shi
Algebraic Side-Channel Attack on Twofish. J. Internet Serv. Inf. Secur. 7 (2) (2017)
Fatemeh Tehranipoor, Nima Karimian, Wei Yan, John A. Chandy
DRAM-Based Intrinsic Physically Unclonable Functions for System-Level Security and Authentication. IEEE Trans. Very Large Scale Integr. Syst. 25 (3) (2017)
Fatemeh Tehranipoor, Nima Karimian, Wei Yan, John A. Chandy
A Study of Power Supply Variation as a Source of Random Noise. VLSI Design (2017)
Cengiz Karakoyunlu, John A. Chandy, Alma Riska
Adding data analytics capabilities to scaled-out object store. J. Syst. Softw. 121 (2016)
Fatemeh Tehranipoor, Wei Yan, John A. Chandy
Robust hardware true random number generators using DRAM remanence effects. HOST (2016)
Cengiz Karakoyunlu, John A. Chandy
Exploiting user metadata for energy-aware node allocation in a cloud storage system. J. Comput. Syst. Sci. 82 (2) (2016)
Shahed E. Quadir, Junlin Chen, Domenic Forte, Navid Asadizanjani, Sina Shahbazmohamadi, Lei Wang, John A. Chandy, Mark M. Tehranipoor
A Survey on Chip to System Reverse Engineering. ACM J. Emerg. Technol. Comput. Syst. 13 (1) (2016)
Wei Yan, Fatemeh Tehranipoor, John A. Chandy
A Novel Way to Authenticate Untrusted Integrated Circuits. ICCAD (2015)
Fatemeh Tehranipoor, Nima Karimian, Kan Xiao, John A. Chandy
DRAM based Intrinsic Physical Unclonable Functions for System Level Security. ACM Great Lakes Symposium on VLSI (2015)
Janardhan Singaraju, Ajithkumar Thamarakuzhi, John A. Chandy
Active storage networks: Using embedded computation in the network switch for cluster data processing. Future Gener. Comput. Syst. 45 (2015)
Supriya Karmakar, John A. Chandy, Faquir C. Jain
Unipolar Logic Gates Based on Spatial Wave-Function Switched FETs. IEEE Trans. Very Large Scale Integr. Syst. 23 (4) (2015)
Rohit K. Mehta, John A. Chandy
Leveraging checkpoint/restore to optimize utilization of cloud compute resources. LCN Workshops (2015)
Cengiz Karakoyunlu, Michael T. Runde, John A. Chandy
Using an Object-Based Active Storage Framework to Improve Parallel Storage Systems. ICPP Workshops (2014)
Orko Momin, Cengiz Karakoyunlu, Michael T. Runde, John A. Chandy
Creating a programmable object storage stack. PSFW@HPDC (2014)
Supriya Karmakar, John A. Chandy, Faquir C. Jain
Implementation of Six Bit ADC and DAC Using Quantum Dot Gate Non-Volatile Memory. J. Signal Process. Syst. 75 (3) (2014)
Orko Momin, John A. Chandy
An object interface storage node for clustered file systems. CLUSTER (2013)
Cengiz Karakoyunlu, John A. Chandy
Optimizations on the Parallel Virtual File System implementation integrated with Object-Based Storage Devices. CLUSTER (2013)
Supriya Karmakar, John A. Chandy, Faquir C. Jain
Design of Ternary Logic Combinational Circuits Based on Quantum Dot Gate FETs. IEEE Trans. Very Large Scale Integr. Syst. 21 (5) (2013)
Michael T. Runde, Wesley G. Stevens, Paul A. Wortman, John A. Chandy
An active storage framework for object storage devices. MSST (2012)
Cengiz Karakoyunlu, John A. Chandy
Techniques for an energy aware parallel file system. IGCC (2012)
Philip H. Carns, Kevin Harms, Dries Kimpe, Robert B. Ross, Justin M. Wozniak, Lee Ward, Matthew L. Curry, Ruth Klundt, Geoff Danielson, Cengiz Karakoyunlu, John A. Chandy, Bradley Settlemeyer, William Gropp
A Case for Optimistic Coordination in HPC Storage Systems. SC Companion (2012)
Ajithkumar Thamarakuzhi, John A. Chandy
2-Dilated flattened butterfly: A nonblocking switching topology for high-radix networks. Comput. Commun. 34 (15) (2011)
Janardhan Singaraju, John A. Chandy
Active Storage Networks for Accelerating K-Means Data Clustering. ARC (2011)
Sumit Narayan, John A. Chandy
Extendable storage framework for reliable clustered storage systems. IPDPS Workshops (2010)
Sumit Narayan, John A. Chandy
ATTEST: ATTributes-based Extendable STorage. J. Syst. Softw. 83 (4) (2010)
Ajithkumar Thamarakuzhi, John A. Chandy
2-dilated flattened butterfly: A nonblocking switching network. HPSR (2010)
Janardhan Singaraju, John A. Chandy
Parallel Data Sort Using Networked FPGAs. ReConFig (2010)
Anuradharthi Thiruvenkata Ramani, John A. Chandy
An Analysis of Parallel Programming Techniques for Data Intensive Computation. PDPTA (2009)
John A. Chandy
An analysis of resource costs in a public computing grid. IPDPS (2009)
Tina Miriam John, Anuradharthi Thiruvenkata Ramani, John A. Chandy
Active storage using object-based devices. CLUSTER (2008)
John A. Chandy
RAID0.5: design and implementation of a low cost disk array data protection method. J. Supercomput. 46 (2) (2008)
John A. Chandy, Faquir C. Jain
Multiple Valued Logic Using 3-State Quantum Dot Gate FETs. ISMVL (2008)
Janardhan Singaraju, John A. Chandy
FPGA based string matching for network processing applications. Microprocess. Microsystems 32 (4) (2008)
John A. Chandy, Sumit Narayan
Reliability tradeoffs in personal storage systems. ACM SIGOPS Oper. Syst. Rev. 41 (1) (2007)
John A. Chandy
Dual actuator logging disk architecture and modeling. J. Syst. Archit. 53 (12) (2007)
Long Bu, John A. Chandy
A CAM-based keyword match processor architecture. Microelectron. J. 37 (8) (2006)
Janardhan Singaraju, John A. Chandy
A generic lookup cache architecture for network processing applications. FPGA (2006)
Janardhan Singaraju, John A. Chandy
A Generic Lookup Cache Architecture for Network Processing Applications. ERSA (2006)
John A. Chandy
RAID0.5: Active Data Replication for Low Cost Disk Array Data Protection. PDPTA (2006)
John A. Chandy
Storage Allocation in Unreliable Peer-to-Peer Systems. DSN (2006)
Michael P. Kapralos, John A. Chandy
A Quorum Based Content Delivery Architecture. PDPTA (2005)
Janardhan Singaraju, Long Bu, John A. Chandy
A Signature Match Processor Architecture for Network Intrusion Detection. FCCM (2005)
John A. Chandy
Parity Redundancy Strategies in a Large Scale Distributed Storage System. MSST (2004)
Long Bu, John A. Chandy
A keyword match processor architecture using content addressable memory. ACM Great Lakes Symposium on VLSI (2004)
Long Bu, John A. Chandy
FPGA Based Network Intrusion Detection using Content Addressable Memories. FCCM (2004)
Jonathan D. Bright, John A. Chandy
Data Integrity in a Distributed Storage System. PDPTA (2003)
Jonathan D. Bright, John A. Chandy
A Scalable Architecture for Clustered Network Attached Storage. IEEE Symposium on Mass Storage Systems (2003)
John A. Chandy, Prithviraj Banerjee
A Parallel Circuit-Partitioned Algorithm for Timing-Driven Standard Cell Placement. J. Parallel Distributed Comput. 57 (1) (1999)
Dhruva R. Chakrabarti, Pramod G. Joisha, John A. Chandy, Krishnaswamy Krishnaswamy, Venkatram Krishnaswamy, Prithviraj Banerjee
WADE: a Web-based automated parallel CAD environment. HiPC (1998)
John G. Holm, John A. Chandy, Steven Parkes, Sumit Roy, Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee
Performance Evaluation of Message-Driven Parallel VLSI CAD Applications on General Purpose Multiprocessors. International Conference on Supercomputing (1997)
Zhaoyun Xing, John A. Chandy, Prithviraj Banerjee
Parallel Global Routing Algorithms for Standard Cells. IPPS (1997)
John A. Chandy, Prithviraj Banerjee
A Parallel Circuit-Partitioned Algorithm for Timing Driven Cell Placement. ICCD (1997)
John A. Chandy, Sungho Kim, Balkrishna Ramkumar, Steven Parkes, Prithviraj Banerjee
An evaluation of parallel simulated annealing strategies with application to standard cell placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16 (4) (1997)
John A. Chandy, Prithviraj Banerjee
Parallel simulated annealing strategies for VLSI cell placement. VLSI Design (1996)
John A. Chandy, Steven Parkes, Prithviraj Banerjee
Distributed Object Oriented Data Structures and Algorithms for VLSI CAD. IRREGULAR (1996)
Prithviraj Banerjee, John A. Chandy, Manish Gupta, Eugene W. Hodges IV, John G. Holm, Antonio Lain, Daniel J. Palermo, Shankar Ramaswamy, Ernesto Su
The Paradigm Compiler for Distributed-Memory Multicomputers. Computer 28 (10) (1995)
Kaushik De, John A. Chandy, Sumit Roy, Steven Parkes, Prithviraj Banerjee
Parallel algorithms for logic synthesis using the MIS approach. IPPS (1995)
Daniel J. Palermo, Ernesto Su, John A. Chandy, Prithviraj Banerjee
Communication Optimizations Used in the PARADIGM Compiler for Distributed Memory Multicomputers. ICPP (2) (1994)
Steven Parkes, John A. Chandy, Prithviraj Banerjee
A library-based approach to portable, parallel, object-oriented programming: interface, implementation, and application. SC (1994)
Sungho Kim, Prithviraj Banerjee, Balkrishna Ramkumar, Steven Parkes, John A. Chandy
ProperPLACE: A Portable Parallel Algorithm for Standard Cell Placement. IPPS (1994)
John A. Chandy, A. L. Narasimha Reddy
Failure Evaluation of Disk Array Organizations. ICDCS (1993)
A. L. Narasimha Reddy, John A. Chandy, Prithviraj Banerjee
Design and Evaluation of Gracefully Degradable Disk Arrays. J. Parallel Distributed Comput. 17 (1-2) (1993)
John A. Chandy, Prithviraj Banerjee
Reliability Evalutaion of Disk Array Architectures. ICPP (1) (1993)