Johannes Zeppenfeld

Publication Activity (10 Years)

Years Active: 2006-2012
Publications (10 Years): 0

Top Topics

High Reliability

Parameter Optimization

Feature Extraction

Hyperparameters

Top Venues

Publications

Abdelmajid Bouajila, Abdallah Lakhtel, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf
A low-overhead monitoring ring interconnect for MPSoC parameter optimization. DDECS (2012)
Johannes Zeppenfeld, Andreas Herkersdorf
Applying autonomic principles for workload management in multi-core systems on chip. ICAC (2011)
Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf
An architecture and an FPGA prototype of a reliable processor pipeline towards multiple soft- and timing errors. DDECS (2011)
Andreas Bernauer, Johannes Zeppenfeld, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel
Combining Software and Hardware LCS for Lightweight On-Chip Learning. DIPES/BICC (2010)
Johannes Zeppenfeld, Andreas Herkersdorf
Autonomic Workload Management for Multi-core Processor Systems. ARCS (2010)
Johannes Zeppenfeld, Abdelmajid Bouajila, Andreas Herkersdorf, Walter Stechele
Towards Scalability and Reliability of Autonomic Systems on Chip. ISORC Workshops (2010)
Matthias May, Norbert Wehn, Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Daniel Ziener, Jürgen Teich
A rapid prototyping system for error-resilient multi-processor systems-on-chip. DATE (2010)
Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf
Learning Classifier Tables for Autonomic Systems on Chip. GI Jahrestagung (2) (2008)
Andreas Lankes, Thomas Wild, Johannes Zeppenfeld
System Level Simulation of Autonomic SoCs with TAPES. ARCS (2008)
Christopher Claus, Johannes Zeppenfeld, Florian Helmut Müller, Walter Stechele
Using partial-run-time reconfigurable hardware to accelerate video processing in driver assistance system. DATE (2007)
Andreas Lankes, Thomas Wild, Johannes Zeppenfeld
Power Estimation of Time Variant SoCs with TAPES. DSD (2007)
Christopher Claus, Florian Helmut Müller, Johannes Zeppenfeld, Walter Stechele
A new framework to accelerate Virtex-II Pro dynamic partial self-reconfiguration. IPDPS (2007)
Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel
Organic Computing at the System on Chip Level. VLSI-SoC (2006)