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Jia-Rong Chang
ORCID
Publication Activity (10 Years)
Years Active: 2019-2022
Publications (10 Years): 4
Top Topics
Fully Integrated
Error Bounds
Fine Granularity
Cross Platform
Top Venues
IEEE Trans. Circuits Syst. II Express Briefs
ISSCC
ISCAS
IEEE J. Solid State Circuits
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Publications
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Jia-Rong Chang
,
Shen-Iuan Liu
A 2-3 GHz Fast-Locking PLL Using Phase Error Compensator.
IEEE Trans. Circuits Syst. II Express Briefs
69 (4) (2022)
Yi-Chung Wu
,
Yen-Lung Chen
,
Chung-Hsuan Yang
,
Chao-Hsi Lee
,
Chao-Yang Yu
,
Nian-Shyang Chang
,
Ling-Chien Chen
,
Jia-Rong Chang
,
Chun-Pin Lin
,
Hung-Lieh Chen
,
Chi-Shi Chen
,
Jui-Hung Hung
,
Chia-Hsiang Yang
A 975-mW Fully Integrated Genetic Variant Discovery System-on-Chip in 28 nm for Next-Generation Sequencing.
IEEE J. Solid State Circuits
56 (1) (2021)
Yi-Chung Wu
,
Yen-Lung Chen
,
Chung-Hsuan Yang
,
Chao-Hsi Lee
,
Chao-Yang Yu
,
Nian-Shyang Chang
,
Ling-Chien Chen
,
Jia-Rong Chang
,
Chun-Pin Lin
,
Hung-Lieh Chen
,
Chi-Shi Chen
,
Jui-Hung Hung
,
Chia-Hsiang Yang
21.1 A Fully Integrated Genetic Variant Discovery SoC for Next-Generation Sequencing.
ISSCC
(2020)
Chun-Ming Huang
,
Chih-Chyau Yang
,
Yi-Jie Hsieh
,
Chun-Wen Cheng
,
Yi-Jun Liu
,
Jia-Rong Chang
,
Yu-Tsang Chang
,
Chien-Ming Wu
A Smart Sensor Development Platform and Its System Demonstration.
ISCAS
(2019)