Jaime Jimenez

Publication Activity (10 Years)

Years Active: 2003-2021
Publications (10 Years): 11

Top Topics

Special Purpose Hardware

Semantic Interoperability

Coloured Petri Nets

Top Venues

iThings/GreenCom/CPSCom/SmartData

Publications

Sara Alonso, Jesús Lázaro, Jaime Jimenez, Leire Muguira, Unai Bidarte
Evaluating the OpenAMP framework in real-time embedded SoC platforms. DCIS (2021)
Roberto Morabito, Jaime Jimenez
IETF Protocol Suite for the Internet of Things: Overview and Recent Advancements. IEEE Commun. Stand. Mag. 4 (2) (2020)
Igor Villalta, Unai Bidarte, Julen Gomez-Cornejo, Jaime Jimenez, Jesús Lázaro
SEU emulation in industrial SoCs combining microprocessor and FPGA. Reliab. Eng. Syst. Saf. 170 (2018)
Jaime Jimenez, Hannes Tschofenig, David Thaler
Report from the Internet of Things (IoT) Semantic Interoperability (IOTSI) Workshop 2016. RFC 8477 (2018)
Mikel Rodriguez, Armando Astarloa, Jesús Lázaro, Unai Bidarte, Jaime Jimenez
System-on-Programmable-Chip AES-GCM implementation for wire-speed cryptography for SAS. DCIS (2018)
Jaime Jimenez, Shanshan Dai, Jacob K. Rosenstein
A microwatt front end and asynchronous ADC for sparse biopotential acquisition. MWSCAS (2017)
Alli Makinen, Jaime Jimenez, Roberto Morabito
ELIoT: Design of an emulated IoT platform. PIMRC (2017)
Naiara Moreira, Jesús Lázaro, Unai Bidarte, Jaime Jimenez, Armando Astarloa
On the Utilization of System-on-Chip Platforms to Achieve Nanosecond Synchronization Accuracies in Substation Automation Systems. IEEE Trans. Smart Grid 8 (4) (2017)
Bilhanan Silverajan, Mert Ocak, Jaime Jimenez, Antti Kolehmainen
Enhancing Lightweight M2M Operations for Managing IoT Gateways. iThings/GreenCom/CPSCom/SmartData (2016)
Armando Astarloa, Unai Bidarte, Jaime Jimenez, Aitzol Zuloaga, Jesús Lázaro
Intelligent gateway for Industry 4.0-compliant production. IECON (2016)
Nicklas Beijar, Oscar Novo, Jaime Jimenez, Jan Melén
Gateway selection in capillary networks. IOT (2015)
Uli Kretzschmar, Armando Astarloa, Jaime Jimenez, Mikel Garay, Javier Del Ser
Compact and Fast Fault Injection System for Robustness Measurements on SRAM-Based FPGAs. IEEE Trans. Ind. Electron. 61 (5) (2014)
Joaquin Perez, Jaime Jimenez, Asier Rabanal, Armando Astarloa, Jesús Lázaro
FTL-CFree: A Fuzzy Real-Time Language for Runtime Verification. IEEE Trans. Ind. Informatics 10 (3) (2014)
Aitzol Zuloaga, Armando Astarloa, Jaime Jimenez, Jesús Lázaro, Jose Angel Araujo
Cost-effective redundancy for ethernet train communications using HSR. ISIE (2014)
Julen Gomez-Cornejo, Aitzol Zuloaga, Uli Kretzschmar, Unai Bidarte, Jaime Jimenez
Fast context reloading lockstep approach for SEUs mitigation in a FPGA soft core processor. IECON (2013)
Uli Kretzschmar, Armando Astarloa, Jaime Jimenez, Mikel Garay, Javier Del Ser
Fast and accurate Single Bit Error injection into SRAM Based FPGAs. FPL (2012)
Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Unai Bidarte, Jaime Jimenez
I2CSec: A secure serial Chip-to-Chip communication protocol. J. Syst. Archit. 57 (2) (2011)
Uli Kretzschmar, Armando Astarloa, Jesús Lázaro, Jaime Jimenez, Aitzol Zuloaga
An automatic experimental set-up for robustness analysis of designs implemented on SRAM FPGAS. SoC (2011)
Uli Kretzschmar, Armando Astarloa, Jesús Lázaro, Unai Bidarte, Jaime Jimenez
Robustness Analysis of Different AES Implementations on SRAM Based FPGAs. ReConFig (2011)
Oscar Daniel Diaz, Armando Astarloa, Aitzol Zuloaga, Jesús Lázaro, Jaime Jimenez
NoCmodel: An extensible framework for Network-on-Chips modeling. ReCoSoC (2011)
Taho Dorta, Jaime Jimenez, José Luis Martín, Unai Bidarte, Armando Astarloa
Reconfigurable Multiprocessor Systems: A Review. Int. J. Reconfigurable Comput. 2010 (2010)
Jesús Lázaro, Armando Astarloa, Unai Bidarte, Jaime Jimenez, Aitzol Zuloaga
AES-Galois Counter Mode Encryption/Decryption FPGA Core for Industrial and Residential Gigabit Ethernet Communications. ARC (2009)
Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, Jaime Jimenez
PCIREX: A Fast Prototyping Platform for TMR Dynamically Reconfigurable Systems. ReConFig (2009)
Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, Jaime Jimenez
DNAX-BCU: An Un-clonable Cost-conscious SoPC Implementation for Bus Coupling Units of the European Installation Bus. ICDCS Workshops (2009)
Taho Dorta, Jaime Jimenez, José Luis Martín, Unai Bidarte, Armando Astarloa
Overview of FPGA-Based Multiprocessor Systems. ReConFig (2009)
Armando Astarloa, Unai Bidarte, Jaime Jimenez, Jesús Lázaro, Iñigo Martínez de Alegría
Secure Ethernet Point-to-Point Links for Autonomous Electronic Ballot Boxes. ATC (2008)
Armando Astarloa, Aitzol Zuloaga, Unai Bidarte, José Luis Martín, Jesús Lázaro, Jaime Jimenez
Tornado: A self-reconfiguration control system for core-based multiprocessor CSoPCs. J. Syst. Archit. 53 (9) (2007)
Jaime Jimenez, José Luis Martín, Unai Bidarte, Armando Astarloa, Aitzol Zuloaga
Design of a Master Device for the Multifunction Vehicle Bus. IEEE Trans. Veh. Technol. 56 (6) (2007)
Jagoba Arias, Jesús Lázaro, Aitzol Zuloaga, Jaime Jimenez, Armando Astarloa
GPS-less location algorithm for wireless sensor networks. Comput. Commun. 30 (14-15) (2007)
Jaime Jimenez, José Luis Martín, Aitzol Zuloaga, Unai Bidarte, Jagoba Arias
Comparison of two designs for the multifunction vehicle bus. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (5) (2006)
Jagoba Arias, Eduardo Santos, Itziar Marín, Jaime Jimenez, Jesús Lázaro, Aitzol Zuloaga
Node Synchronization in Wireless Sensor Networks. ICWMC (2006)
Jaime Jimenez, Iker Hoyos, Jagoba Arias, Armando Astarloa, José Luis Martín
Modifying Slots in Test Vectors to Validate Decoders of a Train Network. ICWMC (2006)
Jagoba Arias, Jesús Lázaro, Aitzol Zuloaga, Jaime Jimenez
Doppler Location Algorithm for Wireless Sensor Networks. International Conference on Wireless Networks (2004)
Unai Bidarte, Armando Astarloa, Aitzol Zuloaga, Jaime Jimenez, Iñigo Martínez de Alegría
Core-Based Reusable Architecture for Slave Circuits with Extensive Data Exchange Requirements. FPL (2003)