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Jaewon Seo
Publication Activity (10 Years)
Years Active: 1997-2012
Publications (10 Years): 0
Top Topics
Recently Developed
Computationally Efficient
Theoretical Analysis
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Top Venues
Comput. J.
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Publications
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Hyungjung Seo
,
Jaewon Seo
,
Taewhan Kim
Algorithms for Combined Inter- and Intra-Task Dynamic Voltage Scaling.
Comput. J.
55 (11) (2012)
Mihui Kim
,
Jaewon Seo
,
Kijoon Chae
Integrated Notification Architecture Based on Overlay Against DDoS Attacks on Convergence Network.
SEUS
(2007)
Jaewon Seo
,
Taewhan Kim
,
Joonwon Lee
Optimal intratask dynamic voltage-scaling technique and its practical extensions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
25 (1) (2006)
Jaewon Seo
,
Myeong-Jong Yu
,
Chan Gook Park
,
Jang Gyu Lee
An Extended Robust H$_infty$Filter for Nonlinear Constrained Uncertain Systems.
IEEE Trans. Signal Process.
54 (11) (2006)
Jaewon Seo
,
Dohyoung Chung
,
Chan Gook Park
,
Jang Gyu Lee
The robustness of controllability and observability for discrete linear time-varying systems with norm-bounded uncertainty.
IEEE Trans. Autom. Control.
50 (7) (2005)
Jaewon Seo
,
Taewhan Kim
,
Nikil D. Dutt
Optimal integration of inter-task and intra-task dynamic voltage scaling techniques for hard real-time applications.
ICCAD
(2005)
Jaewon Seo
,
Myeong-Jong Yu
,
Chan Gook Park
,
Jang Gyu Lee
An Extended Robust H infinity Filter for Nonlinear Uncertain Systems with Constraints.
CDC/ECC
(2005)
Jaewon Seo
,
Nikil D. Dutt
A generalized technique for energy-efficient operating voltage set-up in dynamic voltage scaled processors.
ASP-DAC
(2005)
Jaewon Seo
,
Taewhan Kim
,
Ki-Seok Chung
Profile-based optimal intra-task voltage scheduling for hard real-time applications.
DAC
(2004)
Jaewon Seo
,
Taewhan Kim
,
Preeti Ranjan Panda
Memory allocation and mapping in high-level synthesis - an integrated approach.
IEEE Trans. Very Large Scale Integr. Syst.
11 (5) (2003)
Jaewon Seo
,
Taewhan Kim
,
Preeti Ranjan Panda
An integrated algorithm for memory allocation and assignment in high-level synthesis.
DAC
(2002)
Jaewon Seo
,
Taewhan Kim
Memory exploration utilizing scheduling effects in high-level synthesis.
ISCAS (4)
(2002)
Kyungwan Nam
,
Jaewon Seo
,
Sunggu Lee
,
Jong Kim
Synchronous Load Balancing in Hypercube Multicomputers with Faulty Nodes.
J. Parallel Distributed Comput.
58 (1) (1999)
Jaewon Seo
,
Sunggu Lee
,
Jong Kim
Synchronous Load Balancing in Hypercube Multicomputers with Faulty Nodes.
ICPADS
(1997)