Jabulani Nyathi

Publication Activity (10 Years)

Years Active: 1996-2021
Publications (10 Years): 2

Top Topics

Cmos Technology

Power Dissipation

Root Mean Square

Top Venues

Publications

Saqer Alhloul, Uri Rogers, Donald C. Richter, Jabulani Nyathi
An experimental justification for the proportionality between the coherence bandwidth and the root mean square time delay spread using deterministic time of arrivals. Phys. Commun. 49 (2021)
Jabulani Nyathi, Abubaker Mutumba
Slowing the none-critical path to improve carry look-ahead adder power dissipation. MWSCAS (2017)
Jabulani Nyathi, Souradip Sarkar, Partha Pratim Pande
Multiple clock domain synchronization for network on chip architectures. SoCC (2007)
Hsiang-Ling Jamie Lin, Jabulani Nyathi, Clint Cole
Evaluation of CPU Utilization Under a Hardware-software Partitioned Enviroment (Migrating Software to Hardware). ESA (2007)
Valeriu Beiu, Snorre Aunet, Jabulani Nyathi, Ray Robert Rydberg III, Walid Ibrahim
Serial Addition: Locally Connected Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2007)
Kamini Prajapati, Jabulani Nyathi
An Efficient Key Update Scheme For Wireless Sensor Networks. ICWN (2006)
Jabulani Nyathi, Brent Bero
Logic circuits operating in subthreshold voltages. ISLPED (2006)
Valeriu Beiu, Jabulani Nyathi, Snorre Aunet, Mawahib H. Sulieman
Femto Joule Switching for Nano Electronics. AICCSA (2006)
José G. Delgado-Frias, Jabulani Nyathi, Suryanarayana Tatapudi
Decoupled dynamic ternary content addressable memories. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2005)
Ray Robert Rydberg III, Jabulani Nyathi, José G. Delgado-Frias
A distributed FIFO scheme for on chip communication. ISCAS (2) (2005)
Valeriu Beiu, Snorre Aunet, Jabulani Nyathi, Ray Robert Rydberg III, Asbjørn Djupdal
On the Advantages of Serial Architectures for Low-Power Reliable Computations. ASAP (2005)
Ray Robert Rydberg III, Jabulani Nyathi, José G. Delgado-Frias
A Distributed FIFO Scheme for System on Chip Inter-Component Communication. ESA/VLSI (2004)
James Levy, Jabulani Nyathi
A High Performance, Low Area Overhead Carry Lookahead Adder. ESA/VLSI (2004)
José G. Delgado-Frias, Jabulani Nyathi
A wave-pipelined CMOS associate router for communication switches. ISCAS (2000)
José G. Delgado-Frias, Jabulani Nyathi, Laxmi N. Bhuyan
A wave-pipelined router architecture using ternary associative memory. ACM Great Lakes Symposium on VLSI (2000)
José G. Delgado-Frias, Jabulani Nyathi
A VLSI High-Performance Encoder with Priority Lookahead. Great Lakes Symposium on VLSI (1998)
José G. Delgado-Frias, Jabulani Nyathi, Chester L. Miller, Douglas H. Summerville
A VLSI Interconnection Network Router Using a D-CAM with Hidden Refresh. Great Lakes Symposium on VLSI (1996)