Login / Signup
A wave-pipelined router architecture using ternary associative memory.
José G. Delgado-Frias
Jabulani Nyathi
Laxmi N. Bhuyan
Published in:
ACM Great Lakes Symposium on VLSI (2000)
Keyphrases
</>
associative memory
alpha beta
storage capacity
kohonen feature map
bi directional
hardware architecture
neural network
human memory
processing elements
neural network model
auto associative
vlsi implementation
linear array
data sets
image processing