J. Robert Heath

Publication Activity (10 Years)

Years Active: 1977-2011
Publications (10 Years): 0

Publications

Rishvanth Kora Venugopal, J. Robert Heath, Daniel L. Lau
FPGA based parallel architecture implementation of Stacked Error Diffusion algorithm. SASP (2011)
Veerendra Bhargav Alluri, J. Robert Heath, Michael Lhamon
A new multichannel, coherent amplitude modulated, time-division multiplexed, software-defined radio receiver architecture, and field-programmable-gate-array technology implementation. IEEE Trans. Signal Process. 58 (10) (2010)
J. Robert Heath, Sridhar Hegde, Kanchan Bhide
Development and Validation of a Load Balancing and Control Mechanism for a Reconfigurable Single-Chip Heterogenous and Hybrid Multiprocessor Architecture Platform. PDCCS (2009)
J. Robert Heath, Nien Y. Lim, Kenneth L. Calvert, Jim Griffioen
A New Reconfigurable Network Node Processor Architecture for Distributed Implementation of Ephemeral State Processing. PDCCS (2009)
Phani Tangirala, J. Robert Heath, Arthur Radun, Terry Conners
A Hand-Held Programmable-Logic-Device Based Temperature and Relative-Humidity Sensor, Processor and Display System Platform for Automation and Control of Industry Processes. IAS (2008)
Albert T. Wong, J. Robert Heath, Michael Lhamon
New systolic array processor architecture for simultaneous discrete convolution of an image plane with multiple filter coefficient sets. J. Electronic Imaging 16 (1) (2007)
M. Muthulakshmi, J. Robert Heath, Kenneth L. Calvert, James Griffioen
ESP: a flexible, high-performance, PLD-based network service. ICC (2004)
J. Robert Heath, Andrew Tan
Modeling, Design, Virtual and Physical Prototyping, Testing, and Verification of a Multifunctional Processor Queue for a Single-Chip Multiprocessor Architecture. IEEE International Workshop on Rapid System Prototyping (2001)
J. Robert Heath, Peter Yakutis
High speed storage area networks using a fibre channel arbitrated loop interconnect. IEEE Netw. 14 (2) (2000)
J. Robert Heath, Balasubramanian Sivanesa
Development, Analysis, and Verification of a Parallel Hybrid Dataflow Computer Architectural Framework and Associated Load-Balancing Strategies and Algorithms via Parallel Simulation. Simul. 69 (1) (1997)
Tae Won Cho, Sam S. Pyo, J. Robert Heath
PARALLEX: a parallel approach to switchbox routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13 (6) (1994)
Tae Won Cho, Sam S. Pyo, J. Robert Heath
A new conflict resolving switchbox router. Great Lakes Symposium on VLSI (1992)
J. Robert Heath, Eric Allen Disch
A methodology for the control and custom VLSI implementation of large-scale Clos networks. ICCD (1988)
J. Robert Heath
A note on "Realization of digital filters using input-scaled floating-point arithmetic". IEEE Trans. Acoust. Speech Signal Process. 34 (4) (1986)
George Broomell, J. Robert Heath
An Integrated-Circuit Crossbar Switching System Design. ICDCS (1984)
George Broomell, J. Robert Heath
Classification Categories and Historical Development of Circuit Switching Topologies. ACM Comput. Surv. 15 (2) (1983)
J. Robert Heath, George Broomell, Andrew D. Hurt
A distributed computer architecture for real-time, data driven applications. ICDCS (1982)
Andrew D. Hurt, J. Robert Heath
A Hardware Task Scheduling Mechanism for a Real-Time Multi-Microprocessor Architecture. RTSS (1982)
Andrew D. Hurt, J. Robert Heath
The Design of a Fault-Tolerant Computing Element for Distributed Data Processors. ICDCS (1982)
J. Robert Heath, Shailesh Patel
How to Write a Universal Cross-Assembler. IEEE Micro 1 (3) (1981)
J. Robert Heath, James Cline
The Complexity and Use of a Multistage Interconnection Network for Distributed Processing Systems. RTSS (1980)
J. Robert Heath, Bill D. Carroll, Terry T. Cwik
CDL - A tool for concurrent hardware and software development. DAC (1977)