A New Reconfigurable Network Node Processor Architecture for Distributed Implementation of Ephemeral State Processing.
J. Robert HeathNien Y. LimKenneth L. CalvertJim GriffioenPublished in: PDCCS (2009)
Keyphrases
- parallel architecture
- functional units
- reconfigurable hardware
- computation intensive
- hardware implementation
- distributed processing
- processing elements
- network nodes
- distributed computing environment
- systolic array
- general purpose processors
- local area network
- layered architecture
- peer to peer
- parallel processing
- computing platform
- computer networks
- memory management
- instruction set
- data flow
- hardware architecture
- distributed network
- hierarchical architecture
- real time
- single instruction multiple data
- network architecture
- distributed systems
- network topologies
- parallel computers
- communication cost
- dynamic reconfiguration
- low cost
- processing units
- field programmable gate array
- high speed
- central site
- application specific
- xilinx virtex
- fpga device
- parallel implementation
- floating point
- data transfer
- computer architecture
- node failures
- distributed hash table
- ad hoc networks
- mobile agents
- directory service
- central processor