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Inbal Stanger
ORCID
Publication Activity (10 Years)
Years Active: 2020-2024
Publications (10 Years): 13
Top Topics
Imperative Programs
Energy Efficient
Xilinx Virtex
Dynamic Logic
Top Venues
ISCAS
PRIME
IEEE Trans. Circuits Syst. I Regul. Pap.
IEEE Trans. Circuits Syst. II Express Briefs
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Publications
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Inbal Stanger
,
Noam Roknian
,
Netanel Shavit
,
Yonatan Shoshan
,
Yoav Weizman
,
Adam Teman
,
Edoardo Charbon
,
Alexander Fish
Revisiting Dynamic Logic - A True Candidate for Energy-Efficient Cryogenic Operation in Nanoscaled Technologies.
IEEE Trans. Circuits Syst. I Regul. Pap.
71 (3) (2024)
Noam Roknian
,
Yonatan Shoshan
,
Inbal Stanger
,
Menachem Goldzweig
,
Yoav Weizmann
,
Adam Teman
,
Edoardo Charbon
,
Alexander Fish
Methodologies for Device Characterization in Cryogenic Temperatures.
PRIME
(2024)
Netanel Shavit
,
Inbal Stanger
,
Ramiro Taco
,
Leonid Yavits
,
Alexander Fish
Low Power, Energy Efficient and High Performance Triple Mode Logic for IoT Applications.
PRIME
(2024)
Netanel Shavit
,
Inbal Stanger
,
Ramiro Taco
,
Alexander Fish
,
Itamar Levi
Programmable All-in-One 4×8-/2×16-/1×32-Bits Dual Mode Logic Multiplier in 16 nm FinFET With Semi-Automatic Flow.
IEEE Access
11 (2023)
Noam Roknian
,
Yonatan Shoshan
,
Inbal Stanger
,
Adam Teman
,
Edoardo Charbon
,
Alexander Fish
Overview of Cryogenic Operation in Nanoscale Technology Nodes.
LASCAS
(2023)
Inbal Stanger
,
Noam Roknian
,
Yonatan Shoshan
,
Zafrir Levy
,
Yoav Weizman
,
Edoardo Charbon
,
Adam Teman
,
Alexander Fish
Evaluation of Dual Mode Logic Under Cryogenic Temperatures.
ISCAS
(2022)
Yizhak Shifman
,
Inbal Stanger
,
Netanel Shavit
,
Ramiro Taco
,
Alexander Fish
,
Joseph Shor
A Method for Mitigation of Droop Timing Errors Including a 500 MHz Droop Detector and Dual Mode Logic.
IEEE J. Solid State Circuits
57 (2) (2022)
Inbal Stanger
,
Netanel Shavit
,
Ramiro Taco
,
Marco Lanuzza
,
Alexander Fish
Live Demo: Silicon Evaluation of Multimode Dual Mode Logic for PVT-Aware Datapaths.
ISCAS
(2021)
Netanel Shavit
,
Inbal Stanger
,
Ramiro Taco
,
Marco Lanuzza
,
Alexander Fish
Live Demonstration: A 0.8V, 1.54 pJ / 940 MHz Dual Mode Logic-Based 16x16-Bit Booth Multiplier in 16-nm FinFET.
ISCAS
(2021)
Inbal Stanger
,
Netanel Shavit
,
Ramiro Taco
,
Leonid Yavits
,
Marco Lanuzza
,
Alexander Fish
Robust Dual Mode Pass Logic (DMPL) for Energy Efficiency and High Performance.
ISCAS
(2020)
Ramiro Taco
,
Leonid Yavits
,
Netanel Shavit
,
Inbal Stanger
,
Marco Lanuzza
,
Alexander Fish
Exploiting Single-Well Design for Energy-Efficient Ultra-Wide Voltage Range Dual Mode Logic-Based Digital Circuits in 28nm FD-SOI Technology.
ISCAS
(2020)
Inbal Stanger
,
Netanel Shavit
,
Ramiro Taco
,
Marco Lanuzza
,
Alexander Fish
Silicon Evaluation of Multimode Dual Mode Logic for PVT-Aware Datapaths.
IEEE Trans. Circuits Syst. II Express Briefs
(9) (2020)
Leonid Yavits
,
Ramiro Taco
,
Netanel Shavit
,
Inbal Stanger
,
Alexander Fish
Dual Mode Logic Address Decoder.
ISCAS
(2020)