Login / Signup
Imad Benacer
ORCID
Publication Activity (10 Years)
Years Active: 2015-2019
Publications (10 Years): 8
Top Topics
Differentiated Services
Fpga Implementation
Priority Queue
Conveyor Belt
Top Venues
NEWCAS
ISCAS
IEEE Access
Int. J. Autom. Comput.
</>
Publications
</>
Imad Benacer
,
François-Raymond Boyer
,
Yvon Savaria
A High-Speed, Scalable, and Programmable Traffic Manager Architecture for Flow-Based Networking.
IEEE Access
7 (2019)
Imad Benacer
,
François-Raymond Boyer
,
Yvon Savaria
HPQS: A Fast, High-Capacity, Hybrid Priority Queuing System for High-Speed Networking Devices.
IEEE Access
7 (2019)
Imad Benacer
,
François-Raymond Boyer
,
Yvon Savaria
HPQ: A High Capacity Hybrid Priority Queue Architecture for High-Speed Network Switches.
NEWCAS
(2018)
Imad Benacer
,
François-Raymond Boyer
,
Yvon Savaria
Design of a Low Latency 40 Gb/s Flow-Based Traffic Manager Using High-Level Synthesis.
ISCAS
(2018)
Imad Benacer
,
François-Raymond Boyer
,
Yvon Savaria
A Fast, Single-Instruction-Multiple-Data, Scalable Priority Queue.
IEEE Trans. Very Large Scale Integr. Syst.
26 (10) (2018)
Imad Benacer
,
François-Raymond Boyer
,
Yvon Savaria
A high-speed traffic manager architecture for flow-based networking.
NEWCAS
(2017)
Imad Benacer
,
François-Raymond Boyer
,
Normand Bélanger
,
Yvon Savaria
A fast systolic priority queue architecture for a flow-based Traffic Manager.
NEWCAS
(2016)
Imad Benacer
,
Zohir Dibi
Extracting parameters of OFET before and after threshold voltage using genetic algorithms.
Int. J. Autom. Comput.
13 (4) (2016)
Imad Benacer
,
Aicha Hamissi
,
Abdelhakim Khouas
A novel stereovision algorithm for obstacles detection based on U-V-disparity approach.
ISCAS
(2015)
Imad Benacer
,
Aicha Hamissi
,
Abdelhakim Khouas
Hardware design and FPGA implementation for road plane extraction based on V-disparity approach.
ISCAS
(2015)