Hiromu Uemura

Publication Activity (10 Years)

Years Active: 2016-2018
Publications (10 Years): 5

Top Topics

Cmos Technology

Labeling Process

Band Pass Filters

Top Venues

Publications

Ryosuke Noguchi, Kosuke Furuichi, Hiromu Uemura, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Hiroaki Katsurai, Shinsuke Nakano, Hideyuki Nosaka
MOS D-flip-flop in 65-nm CMOS. VLSI-DAT (2018)
Tomonori Tanaka, Kosuke Furuichi, Hiromu Uemura, Ryosuke Noguchi, Natsuyuki Koda, Koki Arauchi, Daichi Omoto, Hiromi Inaba, Keiji Kishine, Shinsuke Nakano, Masafumi Nogawa, Hideyuki Nosaka
25-Gb/s clock and data recovery IC using latch-load combined with CML buffer circuit for delay generation with 65-nm CMOS. ISCAS (2017)
Kosuke Furuichi, Hiromu Uemura, Natsuyuki Koda, Hiromi Inaba, Keiji Kishine
Design of high-linearity delay detection circuit for 10-Gb/s communication system in 65-nm CMOS. ISOCC (2016)
Keiji Kishine, Hiroshi Inoue, Kosuke Furuichi, Natsuyuki Koda, Hiromu Uemura, Hiromi Inaba, Makoto Nakamura, Akira Tsuchiya
36-Gb/s CDR IC using simple passive loop filter combined with passive load in phase detector. ISOCC (2016)
Natsuyuki Koda, Kosuke Furuichi, Hiromu Uemura, Hiromi Inaba, Keiji Kishine
Proposal for sensitive frequency demodulator for 10-Gb/s transmission labeling signal system. ISOCC (2016)